HI2315 Просмотр технического описания (PDF) - Intersil
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HI2315 Datasheet PDF : 9 Pages
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HI2315
HI5780 (GE TYP = 200pV/S)
HI2315 (GE TYP = 10pV/S)
FIGURE 12. REPETITIVE OUTPUT WAVEFORM WHERE GE APPEARS (FOR 200Ω, 2VP-P OUTPUT)
Notes On Operation
• Selecting the Output Resistance
- HI2315 is a current output type D/A converter. To create
the output voltage, connect the resistor to the current
output pin.
Specifications:
Output full-scale voltage VFS (Max) = 2.0V
Output full-scale current IFS (Max) = 10mA
- Calculate the output resistance from VFS = IFS x R.
Connect a resistance sixteen times the output
resistance to the reference current pin IREF. In some
cases, as this value may not exist, a similar value can
be used instead.
• Latch up
- The AVDD and DVDD pins must be able to share the
same power supply of the board. This is prevent latch
up caused by potential difference between the two pins
when the power is turned on.
• IREF pin
- The IREF pin is very sensitive to improve the AC
characteristics. Pay attention for capacitance
component not to attach to this pin because its output
may become unstable.
• VG Pin
Note that the VFS will be the following:
VFS = VREF x 16 R/R’.
- R is the resistor to be connected to the IO and R’ is the
resistor to be connected to the IREF. Power consump-
tion can be reduced by increasing the resistance, but
this will on the contrary increase the glitch energy and
data settling time. Set the best values according to the
purpose of use.
• Correlation between Data and Clock
- For the HI2315 to display the desired performance as a
D/A converter, the data transmitted form outside and the
clock must be synchronized properly. Adjust the setup
time (tS) and hold time (tH) as specified in “Electrical
Characteristics.”
- It is recommended to use a 1µF capacitor to improve
the AC characteristics though the typical capacitance
value externally connected to the VG pin is 0.1µF.
• SREF
- The SREF is independent regulated current source. By
connecting it to the VREF, stable output amplitudes that
do not depend on fluctuations in the power supply can
be obtained.
- In this case, as VFS = SREF x 16R/R’, set the VFS
according to R’.
- Do not use this pin as a reference power supply for
other ICs because this is dedicated for the D/A
converter.
• VDD, VSS
- Separate the analog and digital signals around the
device to reduce noise effects. By-pass the VDD pin to
each GND with a 0.1µF ceramics capacitor as near to
the pin as possible for both the digital and analog
signals.
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Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate
and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which
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