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NX2415 Просмотр технического описания (PDF) - Microsemi Corporation

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NX2415 Datasheet PDF : 21 Pages
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NX2415
Based On Transient Requirement
Typically, the output voltage droop during transient
is specified as:
VDROOP <VTRAN @ step load DISTEP
During the transient, the voltage droop during the
transient is composed of two sections. One Section is
dependent on the ESR of capacitor, the other section is
a function of the inductor, output capacitance as well as
input, output voltage. For example, overshoot caused by
DISTEP transient load which is from high load to low load,
can be estimated as the following equation,if assuming
the bandwidth of system is high enough.
Vovershoot
=
ESR × ∆Istep
+
VOUT
2 × L × COUT
× τ2
...(6)
where τ is the a function of capacitor, etc.
τ
=
0LEFVF ×iOfUTIsLtepEFF
Lcrit
ESR ×
COUT
where
if LEFF Lcrit
...(7)
LEFF
=
LOUT
N
=
0.68uH
2
= 0.34uH
Lcrit
=
ESR × COUT × VOUT
Istep
=
ESR E × CE × VOUT
Istep
...(8)
where ESRE and CE represents ESR and capaci-
tance of each capacitor if multiple capacitors are used
in parallel.
The above equation shows that if the selected out-
put inductor is smaller than the critical inductance, the
voltage droop or overshoot is only dependent on the ESR
of output capacitor. For low frequency capacitor such
as electrolytic capacitor, the product of ESR and ca-
pacitance is high and L Lcrit is true. In that case, the
transient spec is dependent on the ESR of capacitor.
In most cases, the output capacitors are multiple
capacitors in parallel. The number of capacitors can be
calculated by the following
N = ESR E × ∆Istep +
VOUT
× τ2
Vtran
2 × L × CE × ∆Vtran
where
...(9)
τ
=
0LEFFV×iOfUTIsLtepEFF
Lcrit
ESRE
×
CE
if LEFF Lcrit ...(10)
For example, assume voltage droop during transient
is 120mV for 30A load step.
If the OS-CON capacitors (1000uF, 7m) is used,
the critical inductance is given as
Lcrit
=
ESR E × CE × VOUT
Istep
=
7mΩ ×1000µF×1.2V = 0.28µH
30A
The effective inductor value is 0.34uH which is big-
ger than critical inductance. In that case, the output volt-
age transient not only dependent on the ESR, but also
capacitance.
number of capacitors is
τ
=
LEFF × ∆Istep
VOUT
ESRE
× CE
= 0.34µH × 30A 7mΩ ×1000µF = 1.5us
1.2V
N = ESRE × ∆Istep +
VOUT
× τ2
Vtran
2× LEFF × CE × ∆Vtran
= 7mΩ×30A +
120mV
1.2V
× (1.5us)2
2 × 0.34µH×1000µF ×120mV
= 1.78
The number of capacitors has to satisfied both ripple
and transient requirement. Overall, we can choose N=2.
It should be considered that the proposed equa-
tion is based on ideal case, in reality, the droop or over-
shoot is typically more than the calculation. The equa-
tion gives a good start. For more margin, more capaci-
tors have to be chosen after the test. Typically, for high
frequency capacitor such as high quality POSCAP es-
pecially ceramic capacitor, 20% to 100% (for ceramic)
more capacitors have to be chosen since the ESR of
capacitors is so low that the PCB parasitic can affect
the results tremendously. More capacitors have to be
selected to compensate these parasitic parameters.
Rev.4.8
9
05/06/08

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