SPT7824A Просмотр технического описания (PDF) - Signal Processing Technologies
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SPT7824A Datasheet PDF : 11 Pages
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ABSOLUTE MAXIMUM RATINGS (Beyond which damage may occur)1 25 °C
Supply Voltages
VCC ........................................................................... +6 V
VEE ........................................................................... -6 V
Input Voltages
Analog Input ............................................... VFB≤VIN≤VFT
VFT, VFB .............................................................. +3.0 V, -3.0 V
Reference Ladder Current ..................................... 12 mA
CLK Input .................................................................. VCC
Output
Digital Outputs .......................................... +30 to -30 mA
Temperature
Operating Temperature ............................ -55 to +125 °C
Junction Temperature1 .............................................. +175 °C
Lead Temperature, (soldering 10 seconds) ........ +300 °C
Storage Temperature ................................ -65 to +150 °C
Note: 1. Operation at any Absolute Maximum Rating is not implied. See Electrical Specifications for proper nominal
applied conditions in typical applications.
ELECTRICAL SPECIFICATIONS
TA=TMIN - TMAX, VCC=+5.0 V, VEE=-5.2 V, DVCC=+5.0 V, VIN=±2.0 V, VSB=-2.0 V, VST=+2.0 V, fCLK=40 MHz, 50% clock duty cycle, unless otherwise
specified.
PARAMETERS
TEST
CONDITIONS
TEST
SPT7824A
SPT7824B
LEVEL MIN TYP MAX MIN TYP MAX UNITS
Resolution
10
10
Bits
DC Accuracy (+25 °C)
±Full Scale
Integral Nonlinearity
100 kHz Sample Rate
V
Differential Nonlinearity
V
No Missing Codes
VI
±1.0
±0.5
Guaranteed
±1.5
LSB
±0.75
LSB
Guaranteed
Analog Input
Input Voltage Range
Input Bias Current
Input Bias Current
Input Resistance
Input Resistance
Input Capacitance
Input Bandwidth
+FS Error
-FS Error
fCLK=1 MHz
VIN=0 V
TA=-55 to +125 °C
TA=-55 to +125 °C
3 dB Small Signal
V
±2.0
±2.0
V
VI
30
60
30
60 µA
IV
75
75 µA
VI
100 300
100 300
kΩ
IV
75 300
75 300
kΩ
V
5
5
pF
V
120
120
MHz
V
±2.0
±2.0
LSB
V
±2.0
±2.0
LSB
Reference Input
fCLK=1 MHz
Reference Ladder Resistance
Reference Ladder Tempco
VI
500 800
V
0.8
500 800
0.8
Ω
Ω/°C
Timing Characteristics
Maximum Conversion Rate
Overvoltage Recovery Time
Pipeline Delay (Latency)
Output Delay
Aperture Delay Time
Aperture Jitter Time
Acquisition Time
Dynamic Performance
Effective Number of Bits
fIN=1 MHz
fIN=3.58 MHz
fIN=10.0 MHz
TA=+25 °C
TA=+25 °C
TA=+25 °C
TA=+25 °C
VI
40
40
MHz
V
20
20
ns
IV
1
1 Clock Cycle
V
14
18
14
18 ns
V
1
1
ns
V
5
5
ps-RMS
V
12
12
ns
8.7
8.2
Bits
8.7
8.2
Bits
7.3
6.9
Bits
Typical thermal impedances (unsoldered, in free air): 28L sidebrazed DIP: θja = 50 °C/W, 28L plastic DIP: θja = 50°C/W,
28L SOIC: θja = 100 °C/W.
SPT
2
SPT7824
3/11/97
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