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NJW1173 Просмотр технического описания (PDF) - Japan Radio Corporation

Номер в каталоге
Компоненты Описание
производитель
NJW1173
JRC
Japan Radio Corporation  JRC
NJW1173 Datasheet PDF : 17 Pages
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NJW1173
s I2C BUS CHARACTERISTICS (SDA, SCL)
I2C BUS Load Conditions: Pull up resistance 4k(Connected to +5V), Load capacitance 200pF (Connected to GND)
PARAMETER
Standard mode
Fast mode
SYMBOL
UNIT
MIN. TYP. MAX. MIN. TYP. MAX.
Low Level Input Voltage
VIL
0.0
-
1.5 0.0
-
1.5
V
High Level Input Voltage
VIH
2.7
-
5.0 2.7
-
5.0
V
Hysteresis of Schmitt trigger inputs
Vhys
-
-
-
0.25
-
-
V
Low level output voltage (3mA at SDA pin)
VOL
Output fall time from VIHmin to VILmax with
a bus capacitance from 10pF to 400pF
tof
Pulse width of spikes which must be suppressed
by the input filter
tSP
Input current each I/O pin with an input voltage
between 0.1VDD and 0.9VDDmax
Ii
Capacitance for each I/O pin
Ci
0
-
0.4
0
-
0.4
V
-
-
250
20
+0.1Cb
-
250
ns
-
-
-
0
-
50
ns
-10
-
10 -10
-
10
µA
-
-
10
-
-
10
pF
SCL clock frequency
fSCL
-
-
100
-
-
400
kHz
Hold time (repeated) START condition.
tHD:STA
4.0
-
-
0.6
-
-
µs
Low period of the SCL clock
tLOW
4.7
-
-
1.3
-
-
µs
High period of the SCL clock
tHIGH
4.0
-
-
0.6
-
-
µs
Set-up time for a repeated START condition
tSU:STA
4.7
-
-
0.6
-
-
µs
Data hold time
tHD:DAT
0
-
3.45
0
-
0.9
µs
Data set-up time
tSU:DAT
250
-
-
100
-
-
ns
Rise time of both SDA and SCL signals
tr
-
- 1000 -
-
300
ns
Fall time of both SDA and SCL signals
tf
-
-
300
-
-
300
ns
Set-up time for STOP condition
tSU:STO
4.0
-
-
0.6
-
-
µs
Bus free time between a STOP and START condition
tBUF
4.7
-
-
1.3
-
-
µs
Capacitive load for each bus line
Cb
-
-
400
-
-
400
pF
Noise margin at the Low level
VnL
0.5
-
-
0.5
-
-
V
Noise margin at the High level
VnH
1
-
-
1
-
-
V
Cb ; total capacitance of one bus line in pF.
SDA
tf
tr
SCL
tHD:STA
S
tLOW
tf
tSU:DAT
tHD:STA
tHD:DAT
tHIGH
tSU:STA
Sr
tSP
tr
tBUF
tSU:STO
P
S
-5-

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