NCV3063DR2G(2006) Просмотр технического описания (PDF) - ON Semiconductor

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производитель

NCV3063DR2G
(Rev.:2006)

1.5 A, Step−Up/Down/Inverting Switching Regulators

ON Semiconductor 

NCP3063, NCP3063B, NCV3063

PIN DESCRIPTION

Pin No.

Pin Name

1

Switch Collector

2

Switch Emitter

3

Timing Capacitor

4

GND

5

Comparator

Inverting Input

6

VCC

7

Ipk Sense

8

N.C.

Description

Internal Darlington switch collector

Internal Darlington switch emitter

Timing Capacitor to control the switching frequency

Ground pin for all internal circuits

Inverting input pin of internal comparator

Voltage supply

Peak Current Sense Input to monitor the voltage drop across an external resistor to limit the peak

current through the circuit

Pin not connected

MAXIMUM RATINGS (measured vs. pin 4, unless otherwise noted)

Rating

Symbol

Value

Unit

VCC pin 6

Comparator Inverting Input pin 5

Darlington Switch Collector pin 1

Darlington Switch Emitter pin 2 (transistor OFF)

Darlington Switch Collector to Emitter pin 1−2

Darlington Switch Current

Ipk Sense pin 7

Power Dissipation and Thermal Characteristics

VCC

0 to +40

V

VCII

− 0.2 to + VCC

V

VSWC

0 to +40

V

VSWE

− 0.6 to + VCC

V

VSWCE

0 to +40

V

ISW

1.5

A

VIPK

− 0.2 to VCC + 0.2

V

PDIP−8

Thermal Resistance Junction−to−Air

RqJA

°C/W

100

SOIC−8

Thermal Resistance Junction−to−Air

Storage Temperature Range

Maximum Junction Temperature

Operating Junction Temperature Range (Note 3)

NCP3063

NCP3063B, NCV3063

RqJA

TSTG

TJ MAX

TJ

180

−65 to +150

+150

0 to +70

−40 to +125

°C/W

°C

°C

°C

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the

Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect

device reliability.

1. This device series contains ESD protection and exceeds the following tests:

Pin 1−8: Human Body Model 2000 V per AEC Q100−002; 003 or JESD22/A114; A115

Machine Model Method 200 V

2. This device contains latch−up protection and exceeds 100 mA per JEDEC Standard JESD78.

3. The relation between junction temperature, ambient temperature and Total Power dissipated in IC is TJ = TA + Rq • PD

4. The pins which are not defined may not be loaded by external signals

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