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NCP5623

Triple Output I2C Controlled RGB LED Driver

ON Semiconductor 

NCP5623

ANALOG SECTION:

(Typical values are referenced to TA = +25°C, Min & Max values are referenced −40°C to +85°C ambient temperature, unless otherwise

noted), operating conditions 2.85 V < Vbat < 5.5 V, unless otherwise noted.

Pin

Symbol

Rating

Min

Typ

Max

Unit

10

IREF

Reference current @VREF = 600 mV

(Note 5, Note 8)

3

12.5

20

mA

10

VREF Reference Voltage (Note 5)

−3%

ILEDR Reference Current (IREF) current ratio

10

Rbias External Reference current Bias resistor (Note 6)

30

600

2400

48

+3%

mV

200

kW

3,4,5

FPWM Internal PWM Frequency (Note 7)

2.1

kHz

5. The external circuit must not force the IREF pin voltage either higher or lower than the 600 mV specified. The system is optimized with a

12.5 mA reference current.

6. The overall output current tolerance depends upon the accuracy of the external resistor. Using 1% or better resistor is recommended.

7. This parameter, derived from the 1 MHz clock, is guaranteed by design, not tested in production.

DIGITAL PARAMETERS SECTION:

(Typical values are referenced to TA = +25°C, Min & Max values are referenced −40°C to +85°C ambient temperature, unless otherwise

noted), operating conditions 2.85 V < Vbat < 5.5 V, unless otherwise noted.

Pin

Symbol

Rating

Min

Typ

Max

Unit

11

FSCL Input I2C clock frequency

9,11

VIH

Positive going Input High Voltage Threshold,

1.6

SDA, SCL signals (Note 8)

400

kHz

Vbat

V

9,11

VIL

Negative going Input Low Voltage Threshold,

0

SDA, SCL signals (Note 8)

0.4

V

NOTE: Digital inputs undershoot ≤ 0.30 V to ground, Digital inputs overshoot < 0.30 V to Vbat

8. Test guaranteed by design and fully characterized, not implemented in production.

Chip functionnal, but no parameter guaranteed

when Vbat is between 5.5 V & 7.0 V

7.0 V

5.5 V

The chip might be damaged or destroyed

when Vbat is above 7.0 V

Absolute Maximum Rating

Maximum Voltage Operation

4.2 V

3.0 V

2.7 V

2.0 V

NORMAL Li−IonOPERATION

Power On Reset

No operation during POR

Reserved for internal Reset

Note: the internal POR sequence is 850 ms maximum long

Figure 4. Understanding Integrated Circuit Voltage Limitations

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