NCP4624(2012) Просмотр технического описания (PDF) - ON Semiconductor
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NCP4624 Datasheet PDF : 18 Pages
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NCP4624xxxx
NCP4624
NCP4624Dxx
Vin
Vout Vin
Vout
Vref
Current Limit
CE
Reverse Detector
CE
GND
Vref
Current Limit
Reverse Detector
GND
Figure 2. Simplified Schematic Block Diagram
PIN FUNCTION DESCRIPTION
Pin No.
SOT−23−5
SC−88A
UDFN 1x1
1
5
4
2
3
2
3
1
3
4
2
5
4
1
*EP
Pin Name
VIN
GND
CE
NC
VOUT
EP
Description
Input pin
Ground pin
Chip enable pin (“H” active)
Non connected
Output pin
Exposed Pad (leave floating or connect to GND)
ABSOLUTE MAXIMUM RATINGS
Rating
Symbol
Value
Unit
Input Voltage (Note 1)
Output Voltage
VIN
−0.3 to 12
V
VOUT
−0.3 to VIN ≤ 11
V
Chip Enable Input
VCE
−0.3 to VIN ≤ 11
V
Power Dissipation SOT−23−5
Power Dissipation uDFN 1.0 x 1.0 mm
PD
420
mW
400
Power Dissipation SC−88A
380
Junction Temperature
TJ
−40 to 150
°C
Storage Temperature
TSTG
−55 to 125
°C
ESD Capability, Human Body Model (Note 2)
ESDHBM
2000
V
ESD Capability, Machine Model (Note 2)
ESDMM
200
V
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Refer to Electrical Characteristics and Application Information for safe operating area.
2. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per AEC−Q100−002 (EIA/JESD22−A114)
ESD Machine Model tested per AEC−Q100−003 (EIA/JESD22−A115)
Latchup Current Maximum Rating tested per JEDEC standard: JESD78.
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