NCP1239(2005) Просмотр технического описания (PDF) - ON Semiconductor
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NCP1239 Datasheet PDF : 38 Pages
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NCP1239
PIN FUNCTION DESCRIPTION
Pin No. Pin Name
Function
Pin Description
1
GTS
Shuts the PFC down in The standby detection block changes Pin 1 state in accordance to the mode
standby
(standby or normal mode). Pin1 is designed to drive an external pnp transistor that
connects or disconnects the NCP1239’s VCC to the PFC’s.
2
REF5V
A 5V reference voltage This pin helps to internally bias the controller but can also be used to power
surrounding logic gates for any purposes. The typical output current is 10 mA. This
voltage source is disabled during the circuit startup and latched−off phases. A
100 nF filtering capacitor must be placed between Pin 2 and ground.
3
Fault Detect Enables to permanently If the Pin 3 voltage exceeds 2.4 V, the circuit is permanently shut down. This pin
shutdown the part
can be used to monitor the voltage across a thermistor in order to protect the
application from excessive heating and/or to detect an overvoltage condition.
4
Rt
Timing resistor
Pin 4 resistor allows a precise frequency programming. The circuit is optimized to
operate between 50 kHz and 150 kHz (NCP1239F) and between 100 kHz and
250 kHz (NCP1239V).
5
Brown−Out
Brown−Out
This pin receives a portion of the bulk capacitor to authorize operation above a
certain level of mains only. It also serves to elaborate an offset voltage on Pin 9
used for Over Power Compensation.
6
SS/Timer Performs soft−start and During Power on and fault conditions, the capacitor connected to this pin ensures a
fault timeout
soft−start period. When a fault is detected, this pin is internally brought high by a
current source. If 4.3 V are reached, the fault is confirmed and the circuit enters an
auto−recovery burst mode, otherwise the pin goes back to a lower value and
oscillates to perform frequency jittering.
7
Skip Adjust
Adjust skip level
By adjusting the skip−cycle level, it is possible to fight against noisy transformers
and modify the standby detection thresholds. Keep Pin 7 open to operate with the
default levels (skip threshold setpoint: 140 mV, normal mode recovery setpoint:
250 mV).
8
FB
Feedback signal
An opto−coupler collector pulls this pin low to regulate
9
Over Power Enables a precise peak This pin delivers a current proportional to Vpin5, an image of the high voltage rail.
Limit
current clamp and then an Inserting a resistor between Pin 9 and the current sense resistor, an offset
(NCP1239F) accurate Over Power proportional to the input voltage is built. Such offset compensates the circuit and
Detection
power switch propagation delays for an accurate power limitation in the whole input
voltage range.
9
Max Duty−
Enables to precisely This terminal sources a constant current. Connect a resistor between Pin 9 and
Cycle
clamp the maximum Ground to select the maximum duty−cycle.
(NCP1239V)
duty−cycle.
10
CS
The current sense input This pin receives the primary current information via a sense element. By inserting
a resistor in series with this pin, it becomes possible to introduce ramp
compensation.
11
Ground
The IC ground
−
12
Drv
Drives the MOSFET By offering up to +500 mA/−800 mA peak, this pin lets you drive large Qg
MOSFET’s. It is clamped to 16 V maximum not to exceed the maximum
gate−source voltage of most power MOSFET’s.
13
VCC
Supplies the controller This pin accepts up to 36 V from an auxiliary winding.
14
NC
−
Creepage distance.
15
NC
−
Creepage distance.
16
HV
The high−voltage startup This pin connects to the bulk capacitor to generate the startup current.
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