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HI5728INZ-T Просмотр технического описания (PDF) - Intersil

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HI5728INZ-T Datasheet PDF : 17 Pages
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HI5728
Absolute Maximum Ratings
Digital Supply Voltage DVDD to DCOM . . . . . . . . . . . . . . . . . +5.5V
Analog Supply Voltage AVDD to ACOM. . . . . . . . . . . . . . . . . . +5.5V
Grounds, ACOM TO DCOM . . . . . . . . . . . . . . . . . . . -0.3V to +0.3V
Digital Input Voltages (D9-D0, CLK, SLEEP). . . . . . . . . DVDD +0.3V
Internal Reference Output Current. . . . . . . . . . . . . . . . . . . . . ±50µA
Reference Input Voltage Range. . . . . . . . . . . . . . . . . . AVDD +0.3V
Analog Output Current (IOUT) . . . . . . . . . . . . . . . . . . . . . . . . . 24mA
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C
Thermal Information
Thermal Resistance (Typical, Note 1)
θJA(°C/W)
48 Ld TQFP Package. . . . . . . . . . . . . . . . . . . . . . . .
55
Maximum Power Dissipation
48 Ld TQFP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . .930mW
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +150°C
Maximum Storage Temperature Range . . . . . . . . . -65°C to +150°C
Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTE:
1. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications AVDD = DVDD = +5V, VREF = Internal 1.2V, IOUTFS = 20mA, TA = +25°C for All Typical Values. Data given is
per channel except for “POWER SUPPLY CHARACTERISTICS” on page 8
PARAMETER
TEST CONDITIONS
HI5728IN
TA = -40°C TO +85°C
MIN
MAX
(Note 11) TYP (Note 11)
UNITS
SYSTEM PERFORMANCE (Per Channel)
Resolution
10
-
-
Bits
Integral Linearity Error, INL
“Best Fit” Straight Line (Note 7)
-1
±0.5
+1
LSB
Differential Linearity Error, DNL
(Note 7)
-0.5 ±0.25 +0.5
LSB
Offset Error, IOS
Offset Drift Coefficient
(Note 7)
(Note 7)
-0.025
+0.025
% FSR
-
0.1
-
ppm FSR/°C
Full Scale Gain Error, FSE
With External Reference (Notes 2, 7)
-10
±2
+10
% FSR
With Internal Reference (Notes 2, 7)
-10
±1
+10
% FSR
Full Scale Gain Drift
With External Reference (Note 7)
-
±50
-
ppm FSR/°C
With Internal Reference (Note 7)
-
±100
-
ppm FSR/°C
Gain Matching Between Channels
-0.5
0.1
0.5
dB
I/Q Channel Isolation
Output Voltage Compliance Range
FOUT = 10MHz
(Note 3)
-
80
-
dB
-0.3
-
1.25
V
Full Scale Output Current, IFS
DYNAMIC CHARACTERISTICS (Per Channel)
2
-
20
mA
Maximum Clock Rate, fCLK
Output Settling Time, (tSETT)
(Note 3)
0.1% (±1 LSB, equivalent to 9 Bits) (Note 7)
0.05% (±1/2 LSB, equivalent to 10 Bits) (Note 7)
125
-
-
-
20
-
-
35
-
MHz
ns
ns
Singlet Glitch Area (Peak Glitch)
Output Rise Time
RL = 25Ω (Note 7)
Full Scale Step
-
35
-
-
1.5
-
pV•s
ns
Output Fall Time
Full Scale Step
-
1.5
-
ns
Output Capacitance
-
10
-
pF
Output Noise
IOUTFS = 20mA
-
50
-
pA/ Hz
IOUTFS = 2mA
-
30
-
pA/ Hz
6
FN4321.5
January 22, 2010

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