NBXDDA016LNHTAG Просмотр технического описания (PDF) - ON Semiconductor
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NBXDDA016LNHTAG Datasheet PDF : 6 Pages
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NBXDDA016, NBXDDB016
3.3 V, 133.33 MHz
/137.93 MHz Dual
Frequency CML Clock
Oscillator
The NBXDDB016/NBXDDA016 dual frequency crystal oscillator
(XO) is designed to meet today’s requirements for 3.3 V CML clock
generation applications. The device uses a high Q fundamental crystal
and Phase Lock Loop (PLL) multiplier to provide selectable
133.33 MHz or 137.93 MHz, ultra low jitter and phase noise CML
differential output.
This device is a member of ON Semiconductor’s PureEdget clock
family that provides accurate and precision clock solutions.
Available in 5 mm x 7 mm SMD (CLCC) package on 16 mm tape
and reel in quantities of 1,000. Frequency stability options available as
either 50 PPM NBXDDB016 or 20 PPM NBXDDA016.
Features
• CML Differential Output
• Uses High Q Fundamental Mode Crystal and PLL Multiplier
• Ultra Low Jitter and Phase Noise − 0.4 ps (12 kHz − 20 MHz)
• Selectable Output Frequency − 133.33 MHz (default)/137.93 MHz
• Hermetically Sealed Ceramic SMD Package
• RoHS Compliant
• Operating Range 3.3 V ±10%
• Total Frequency Stability − ±20 PPM or ±50 PPM
Applications
• High−End Servers
• Basestation
• General Purpose Clock Generation and Margining
VDD
6
CLK CLK
54
Crystal
PLL
Clock
Multiplier
http://onsemi.com
6 PIN CLCC
LN SUFFIX
CASE 848AB
MARKING DIAGRAMS
NBXDDB016
133.33/137.93
AWLYYWWG
NBXDDA016
133.33/137.93
AWLYYWWG
NBXDDA016 = NBXDDA016 (±50 PPM)
NBXDDB016 = NBXDDB016 (±20 PPM)
133.33/137.93 = Output Frequency (MHz)
A
= Assembly Location
WL
= Wafer Lot
YY
= Year
WW
= Work Week
G
= Pb−Free Package
ORDERING INFORMATION
Device
Package Shipping†
NBXDDB016LN1TAG* CLCC−6
1000/
(Pb−Free) Tape & Reel
NBXDDA016LN1TAG CLCC−6
1000/
(Pb−Free) Tape & Reel
NBXDDA016LNHTAG CLCC−6
100/
(Pb−Free) Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
* Please contact sales office for availability
1
2
3
OE
FSEL
GND
Figure 1. Simplified Logic Diagram
© Semiconductor Components Industries, LLC, 2009
1
March, 2009 − Rev. 3
Publication Order Number:
NBXDDA016/D
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