NB100LVEP221
VPP
VIHCMR
VCC(LVPECL)
VIH(DIFF)
VPP
VIL(DIFF)
VEE
VCCO(HSTL)
VIH(DIFF)
VX
VIL(DIFF)
VEE
Figure 4. LVPECL Differential Input Levels
Figure 5. HSTL Differential Input Levels
Driver
Device
Q
Q
50 W
D
Receiver
Device
D
50 W
VTT
VTT = VCC - 2.0 V
Figure 6. Typical Termination for Output Driver and Device Evaluation
(Refer to Application Note AND8020 - Termination of ECL Logic Devices.)
Resource Reference of Application Notes
AN1405
- ECL Clock Distribution Techniques
AND8002 - Marking and Date Codes
AND8009 - ECLinPS Plus Spice I/O Model Kit
AND8020 - Termination of ECL Logic Devices
For an updated list of Application Notes, please see our website at http://onsemi.com.
http://onsemi.com
6