PCK2000DL Просмотр технического описания (PDF) - Philips Electronics

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PCK2000DL

CK97 (66/100MHz) System Clock Generator

Philips Electronics 

Philips Semiconductors

CK97 (66/100MHz) System Clock Generator

Product specification

PCK2000

PIN DESCRIPTION

PIN NUMBER

SYMBOL

FUNCTION

1, 2, 47

REF [0–2]

14.318 MHz clock outputs

3

VSSREF

GROUND for REF outputs

48

VDDREF

POWER for REF outputs

4

XTAL_IN

14.318 MHz crystal input

5

XTAL_OUT

14.318 MHz crystal output

6, 12, 18

7

VSSPCI [0–2]

PCICLK_F

GROUND for PCI outputs

Free-running PCI output

9, 15

8, 10, 11, 13, 14, 16, 17

VDDPCI [0–1]

PCICLK [1–7]

POWER for PCI outputs

PCI clock outputs.

19, 33

20, 32

21

24

22, 23

VDDCORE [0–1]

VSSCORE [0–1]

VDD 48MHz

VSS 48MHz

48MHz [0–1]

Isolated POWER for core

Isolated GROUND for core

POWER for 48MHz outputs

GROUND for 48MHz outputs

48MHz outputs

26, 27

SEL0,1

Logic select pins.

25

SEL100/66

Select pin for enabling 66 MHz or 100MHz. L = 66 MHz

H = 100MHz

29

PWRDWN

Control pin to put device in powerdown state, active low

30

CPUSTOP

Control pin to disable CPU clocks, active low

31

PCISTOP

Control pin to disable PCI clocks, active low

37, 41

34, 38

35, 36, 39, 40

VDDCPU [0–1]

VSSCPU [0–1]

CPUCLK [0–3]

POWER for CPU outputs

GROUND for CPU outputs

CPU clock outputs @2.5V

43

46

44, 45

VSSAPIC

VDDAPIC

IOAPIC [0–1]

GROUND for IOAPIC outputs

POWER for IOAPIC outputs

IOAPIC output @ 2.5V

28, 42

RESERVED

Reserved for future use

NOTES:

1. VDD and VSS names in the above tables reflects a likely internal POWER and GROUND partition to reduce the effects of internal noise on

the performance of the device. In reality, the platform will be configured with the VDDAPIC and VDDCPU pins tied to a 2.5V supply, all

remaining VDD pins tied to a common 3.3V supply and all VSS pins being common.

1998 Sep 29

3

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