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AD9750 Просмотр технического описания (PDF) - Analog Devices

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AD9750 Datasheet PDF : 22 Pages
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AD9750
+5V
DVDD
634
1.82V
REFLO
100W
AVDD
500
500
0.1F
REFIO
FSADJ
RSET1
2k
I DATA
INPUT
AD9750
(“I DAC”)
LATCHES
U1
DAC
IOUTA
IOUTB
500
CFILTER
500
100
VPBF
BBIP
BBIN
+
CLK
AVDD
Q DATA
INPUT
AVDD REFLO
LATCHES
QOUTA
U2
AD9750
(“Q DAC”)
DAC
QOUTB
REFIO
FSADJ SLEEP
0.1F
RSET2
1.9k
RCAL
220
ACOM
DCOM
100
500
500
CFILTER
500
100
500
500mV p-p WITH
VCM=1.2V
BBQP
BBQN
PHASE
SPLITTER
AD8346
NOTE: 500RESISTOR NETWORK - OHMTEK ORN5000D
100RESISTOR NETWORK - TOMC1603-100D
Figure 36. Baseband QAM Implementation Using Two AD9750s
VOUT
LOIP
LOIN
It is also possible to generate a QAM signal completely in the
digital domain via a DSP or ASIC, in which case only a single
DAC of sufficient resolution and performance is required to
reconstruct the QAM signal. Also available from several vendors
are Digital ASICs which implement other digital modulation
schemes such as PSK and FSK. This digital implementation has
the benefit of generating perfectly matched I and Q components
in terms of gain and phase, which is essential in maintaining
optimum performance in a communication system. In this imple-
mentation, the reconstruction DAC must be operating at a
sufficiently high clock rate to accommodate the highest specified
QAM carrier frequency. Figure 37 shows a block diagram of
such an implementation using the AD9750.
12
12
I DATA
STEL-1130
12
QAM
Q DATA
AD9750
50
LPF
TO
MIXER
50
12 12
SIN
COS
CARRIER 12 STEL-1177
FREQUENCY
NCO
AD9750 EVALUATION BOARD
General Description
The AD9750-EB is an evaluation board for the AD9750 10-bit
D/A converter. Careful attention to layout and circuit design
combined with a prototyping area allow the user to easily and
effectively evaluate the AD9750 in any application where high
resolution, high speed conversion is required.
This board allows the user the flexibility to operate the AD9750 in
various configurations. Possible output configurations include
transformer coupled, resistor terminated, inverting/noninverting
and differential amplifier outputs. The digital inputs are designed
to be driven directly from various word generators, with the
on-board option to add a resistor network for proper load ter-
mination. Provisions are also made to operate the AD9750
with either the internal or external reference, or to exercise the
power-down feature.
Refer to the application note AN-420 for a thorough description
and operating instructions for the AD9750 evaluation board.
CLOCK
Figure 37. Digital QAM Architecture
REV. 0
–17–

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