MX88L60UC Просмотр технического описания (PDF) - Macronix International
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MX88L60UC Datasheet PDF : 23 Pages
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MX88L60
DRAM Interface
Name
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DWE_B
DCAS_B
DRAS_B
SDCSA_B
SDCSB_B
SDCKE
SDCLKO
DOE_B
DA0
DA1
DA2
DA3
DA4
DA5
DA6
DA7
DA8
DA9
DA10
DBANK
Pin #
6
7
8
9
10
11
12
13
23
22
21
20
19
18
17
16
24
25
26
27
28
29
31
33
36
37
38
39
45
44
43
42
41
40
35
34
Type Definition
I/O DRAM data bit 0, pull high/low, mapping to register DRAM_TYPE[0]
I/O DRAM data bit 1, pull high/low, mapping to register DRAM_TYPE[1]
I/O DRAM data bit 2, pull high/low, mapping to register DCK[0]
I/O DRAM data bit 3, pull high/low, mapping to register DCK[1]
I/O DRAM data bit 4, pull high/low, mapping to register DCK[2]
I/O DRAM data bit 5, pull high/low, mapping to register DCK[3],
I/O DRAM data bit 6, pull high/low, mapping to register TEST[0]
I/O DRAM data bit 7, pull high/low, mapping to register TEST[1]
I/O DRAM data bit 8, pull high/low, mapping to register TEST[2]
I/O DRAM data bit 9, pull high/low, mapping to register TEST[3]
I/O DRAM data bit 10, pull high/low, mapping to register TEST[4]
I/O DRAM data bit 11, pull high/low, mapping to register TEST[5]
I/O DRAM data bit 12, pull high/low, mapping to register TEST[6]
I/O DRAM data bit 13, pull high/low, mapping to register TEST[7]
I/O DRAM data bit 14, pull high/low, mapping to register TEST[8]
I/O DRAM data bit 15, pull high/low, mapping to register TEST[9]
O DRAM write enable
O DRAM Column address strobe
O DRAM Row address strobe
O SDRAM #0 chip select
O SDRAM #1 chip select
O SDRAM clock enable
O SDRAM clock output
O SDRAM, ldqm, udqm,EDORAM output enable
O DRAM address bit 0
O DRAM address bit 1
O DRAM address bit 2
O DRAM address bit 3
O DRAM address bit 4
O DRAM address bit 5
O DRAM address bit 6
O DRAM address bit 7
O DRAM address bit 8
O SDRAM address bit 9
O SDRAM address bit 10
O SDRAM bank select
P/N: PM0743
REV. 2.5B, AUG. 18, 2000
9
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