NT5SV16M4DT Просмотр технического описания (PDF) - Nanya Technology

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NT5SV16M4DT

64Mb Synchronous DRAM

Nanya Technology 

NT5SV16M4DT

NT5SV8M8DT

NT5SV4M16DT

64Mb Synchronous DRAM

Current State Truth Table (Part 1 of 3)(See note 1)

Current State

Idle

Row Active

Read

Write

Command

CS RAS CAS WE BS0,BS1 A11 - A0

Description

LLLL

OP Code

Mode Register Set

L L LH

X

X

Auto or Self Refresh

LLHL

BS

X

Precharge

L LHH

BS Row Address Bank Activate

LHL L

BS

Column Write w/o Precharge

LHLH

BS

Column Read w/o Precharge

L HH L

X

X

Burst Termination

L HHH

X

X

No Operation

HXXX

X

X

Device Deselect

LLLL

OP Code

Mode Register Set

L L LH

X

X

Auto or Self Refresh

LLHL

BS

X

Precharge

L LHH

BS Row Address Bank Activate

LHL L

BS

Column Write

LHLH

BS

Column Read

L HH L

X

X

Burst Termination

L HHH

X

X

No Operation

HXXX

X

X

Device Deselect

LLLL

OP Code

Mode Register Set

L L LH

X

X

Auto or Self Refresh

LLHL

BS

X

Precharge

L LHH

BS Row Address Bank Activate

LHL L

BS

Column Write

LHLH

BS

Column Read

L HH L

X

X

Burst Termination

L HHH

X

X

No Operation

HXXX

X

X

Device Deselect

LLLL

OP Code

Mode Register Set

L L LH

X

X

Auto or Self Refresh

LLHL

BS

X

Precharge

L LHH

BS Row Address Bank Activate

LHL L

BS

Column Write

LHLH

BS

Column Read

L HH L

X

X

Burst Termination

L HHH

X

X

No Operation

HXXX

X

X

Device Deselect

Action

Set the Mode Register

Start Auto or Self Refresh

No Operation

Activate the specified bank and row

ILLEGAL

ILLEGAL

No Operation

No Operation

No Operation or Power Down

ILLEGAL

ILLEGAL

Precharge

ILLEGAL

Start Write; Determine if Auto Precharge

Start Read; Determine if Auto Precharge

No Operation

No Operation

No Operation

ILLEGAL

ILLEGAL

Terminate Burst; Start the Precharge

ILLEGAL

Terminate Burst; Start the Write cycle

Terminate Burst; Start a new Read cycle

Terminate the Burst

Continue the Burst

Continue the Burst

ILLEGAL

ILLEGAL

Terminate Burst; Start the Precharge

ILLEGAL

Terminate Burst; Start a new Write cycle

Terminate Burst; Start the Read cycle

Terminate the Burst

Continue the Burst

Continue the Burst

Notes

2

2, 3

4

4

5

6

4

7, 8

7, 8

4

8, 9

8, 9

4

8, 9

8, 9

1. CKE is assumed to be active (high) in the previous cycle for all entries. The Current State is the state of the bank that the Command is

being applied to.

2. All Banks must be idle; otherwise, it is an illegal action.

3. If CKE is active (high) the SDRAM will start the Auto (CBR) Refresh operation, if CKE is inactive (low) than the Self Refresh mode is

entered.

4. The Current State refers to only one of the banks. If BS selects this bank then the action is illegal. If BS selects the bank not being refer-

enced by the Current State then the action may be legal depending on the state of that bank.

5. If CKE is inactive (low) then the Power Down mode is entered; otherwise there is a No Operation.

6. The minimum and maximum Active time (tRAS) must be satisfied.

7. The RAS to CAS Delay (tRCD) must occur before the command is given.

8. Column address A10 is used to determine if the Auto Precharge function is activated.

9. The command must satisfy any bus contention, bus turn around, and/or write recovery requirements.

10. The command is illegal if the minimum bank to bank delay time (tRRD) is not satisfied.

REV 1.1

10/01

10

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NANYA TECHNOLOGY CORP. reserves the right to change Products and Specifications without notice.

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