MT9075B Просмотр технического описания (PDF) - Zarlink Semiconductor Inc

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MT9075B

E1 Single Chip Transceiver

Zarlink Semiconductor Inc 

MT9075B

Data Sheet

Identification Code

The MT9075B shall be identified by the code 10101010, read from the identification code status register (page 03H,

address 1FH).

Reset Operation (Initialization)

The MT9075B can be reset using the hardware RESET pin (pin 11 in PLCC, pin 84 in MQFP, see pin description

for external reset circuit requirements) or the software reset bit RST (page 01H, address 11H). When the device

emerges from its reset state it will begin to function with the default settings described in Table 6. A reset

operation takes 1 full frame (125 us) to complete.

Function

Status

Mode

Termination

Loopbacks

Deactivated

Transmit FAS

Transmit non-FAS

Transmit MFAS (CAS)

Cn0011011

1/Sn1111111

00001111

Data Link

Deactivated

CRC Interworking

Activated

Signalling

CAS Registers

ABCD Bit Debounce

Deactivated

Interrupts

Interrupt Mask Word

Zero unmasked, all

others masked;

interrupts not suspended

RxMF Output

Signalling Multiframe

Error Insertion

Deactivated

HDLCs

Deactivated

Counters

Cleared

Tx Message Buffer

All locations set to 54H

Per Time Slot Control

Buffer

All locations cleared

Table 6 - Reset Status

Transmit AIS Operation

The pin TAIS (Transmit AIS, pin 60 in PLCC, pin 48 in MQFP) allows an all ones signal to be transmitted from the

point of power-up without the need to write any control registers. During this time the IRQ pin is tristated. After the

interface has been initialized normal operation can take place by making TAIS high.

National Bit Buffers

Table 7 shows the contents of the transmit and receive Frame Alignment Signals (FAS) and Non-frame Alignment

Signals (NFAS) of time slot zero of a PCM 30 signal. Even numbered frames (CRC Frame # 0, 2, 4,...) are FASs

and odd numbered frames (CRC Frame # 1, 3, 5,...) are NFASs. The bits of each channel are numbered 1 to 8, with

bit 1 being the most significant and bit 8 the least significant.

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Zarlink Semiconductor Inc.

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