MT90221AL Просмотр технического описания (PDF) - Mitel Networks

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производитель

MT90221AL

Quad IMA/UNI PHY Device

Mitel Networks 

MT90221

Pin Description (continued)

Pin #

Name I/O

Description

162, 163,

164, 165,

166, 169,

170, 171,

172, 175,

176, 177,

178, 179,

182, 183,

184, 185,

186

sr_a

[18:0]

O Static Memory Address Bus. The signal is used to select an entry in the external

static memory.

187

sr_we O Static Memory Read/Not Write. If low, data is written from the MT90221 to the

memory. If high, data is read from the memory to the MT90221.

198, 199 sr_cs_1, 0 O Static Memory Chip Control Signal.

Processor Interface Signals (see Note 2)

44, 45, 46,

47, 48, 49,

50, 51

55, 56, 57,

58, 59, 60,

61, 62, 63,

64, 65

41

40

39

67

up_d

[7:0]

up_a

[10:0]

up_r/w

or

up_wr

up_oe

or

up_rd

up_cs

up_irq

I/O Processor Data Bus. Data Bus to exchange data between the MT90221 and a

local processor.

I Processor Address Bus. They are used to select the internal registers and

memory positions of the MT90221.

I Processor Read/Not Write. Motorola Mode. This is an input signal. If low, data is

written from the processor to the MT90221. If high, data is read from the MT90221

to the processor.

Processor Not Write (Intel Mode). This is an input signal. If low, data is written

from the processor to the MT90221. De-asserting this signal to high will terminate a

write cycle.

I Output enable Motorola Mode. This is an input signal. This signal should be tied

to GND for Motorola timing mode.

Processor Not Read (Intel Mode). This is an input signal. If low, data is read from

the MT90221.

I Processor Chip Select. This is an active low input signal. If this signal is high, the

MT90221 ignores all other signals on its processor bus. If this signal is low, the

MT90221 accepts the signals on its processor bus. De-asserting this signal to high

will terminate an access cycle.

O Processor Interrupt Request. If this signal is low, the MT90221 signals to the

processor that an interrupt condition is pending inside the MT90221. Otherwise no

interrupt is pending inside the MT90221. Open drain signal.

PCM Interface Signals

99,107,

109,116

136, 143,

145, 151

DSTo

[3:0]

DSTi

[3:0]

O Serial PCM Data Output 3-0. A 1.544 Mbit/s or 2.048 Mbps serial stream which

contain 24 (T1) or 32 (E1) PCM or data channels received on T1 or E1 line. The

output is set to high impedance for unused channels and if the link is not used.

I Serial PCM Data Input 3-0. A 1.544 Mbit/s or 2.048 Mbps serial stream which

contains the 24 (T1) or 32 (E1) PCM or data channels on T1 or E1 line.

5

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