MT8930CC Просмотр технического описания (PDF) - Mitel Networks

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MT8930CC

Subscriber Network Interface Circuit

Mitel Networks 

Preliminary Information

MT8930C

Pin Description (continued)

Pin #

DIP PLCC

Name

Description

9 16 R/W/WR Read/Write or Write Input (Cmode = 1): defines the data bus transfer as a read (R/

W=1) or a write (R/W=0) in Motorola bus mode. Redefined to WR in Intel bus mode.

AFT/PRI Adaptive-Fixed Timing/Priority Select Input (Cmode=0): in NT mode, causes the

PLL and Rx filters and peak detectors to be disabled in favour of fixed timing and fixed

thresholds for short passive bus operation (0=fixed, 1=adaptive). In TE mode, this is the

Priority input. High priority (PRI=1) is normally reserved for signalling.

10 17

DS/RD

DinB

Data Strobe/Read Input (Cmode = 1): active high input indicates to the SNIC that

valid data is on the bus during a write operation or that the SNIC must output data

during a read operation in Motorola bus mode. Redefined to RD in Intel bus mode.

D-Channel in B1 Timeslot Input (Cmode = 0): active high input that causes all

eight ST-BUS D-channel bits, instead of the usual two bits, to be routed to and

from the S-interface B1 timeslot. When active, marks are transmitted in the

S-interface D-channel.

11 19

AS/ALE

P/SC

Address Strobe/Address Latch Enable Input (Cmode = 1): in Motorola bus mode

the falling edge is used to strobe the address into the SNIC during microprocessor

access. Redefined to ALE in Intel bus mode.

Parallel/Serial Control Input (Cmode = 0): determines if the serial C-channel

(P/SC=0) or microport pins (P/SC=1) are the source of chip control when controllerless

mode is selected. If the ST-BUS is chosen as the source, the dedicated Control input

pins are ignored but the status output pins remain valid.

12 20

13 21

14 22

15- 24-26

22 30-32

34-35

CS

DReq

IC

IRQ

NDA

DCack

IC

VSS

AD0-7

Chip Select Input (Cmode=1): active low input used to select the SNIC for

microprocessor access.

D-Channel Request Input (Cmode = 0): an active high input that in TE mode only

causes the SNIC to transmit a “01111110” flag immediately if the D-channel is free, or

wait until it becomes available and then transmit the flag. The DCack signals the

successful acquisition of the D-channel. If DReq is tied low, continuous ones are

transmitted in the S-Bus D-channel.

Internal Connection (Cmode = 0): tie to VSS for normal operation in NT mode only.

Interrupt Request (Open Drain Output) (Cmode = 1): an output indicating an

unmasked HDLC interrupt. The interrupt remains active until the microprocessor clears

it by reading the HDLC Interrupt Status Register. This interrupt source is enabled with

B2=0 of Master Control Register.

New Data Available (Open Drain Output) (Cmode = 1): an active low output signal

indicating availability of new data from the S-Bus. This signal is selected with B2=1 of

Master Control Register.

D-Channel Acknowledge (Open Drain Output) (Cmode = 0): in TE mode only

indicates that the SNIC has gained access to the D-channel in response to a DReq and

has transmitted the first zero of an opening flag. The user should immediately begin

transmitting the rest of the packet over the ST-BUS D-channel. If this signal goes high

in the middle of transmission, the TE has lost the bus and must regain access of the D-

channel before retransmitting the packet.

Internal Connection (Open Drain Output) (C-mode=0). This pin is not used in NT

mode and should be left disconnected.

This pin must be tied to VDD with a 10kΩ resistor.

Ground.

Bidirectional Address/Data Bus (Cmode = 1): electrically and logically compatible to

either Intel or Motorola micro-bus specifications. If DS/RD is low on the rising edge of

AS/ALE then the chip operates to Motorola specs. If DS/RD is high on the rising edge

of AS/ALE Intel mode is selected. Taking Rsti low sets Motorola mode.

15- 24-

16 25

IS0-IS1

Internal State Outputs (Cmode =0): Binary encoded state number outputs.

IS0

IS1

NT Mode

TE Mode

0

0

deactivated

deactivated

0

1

pending deactivation

synchronized

1

0

pending activation

activation request

1

1

activated

activated

9-37

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