128M16 Просмотр технического описания (PDF) - Micron Technology

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производитель

128M16

DDR3 SDRAM

Micron Technology 

2Gb: x4, x8, x16 DDR3 SDRAM

Features

List of Tables

Table 1: Key Timing Parameters ....................................................................................................................... 1

Table 2: Addressing ......................................................................................................................................... 2

Table 3: 78-Ball FBGA – x4, x8 Ball Descriptions .............................................................................................. 18

Table 4: 96-Ball FBGA – x16 Ball Descriptions ................................................................................................. 20

Table 5: Absolute Maximum Ratings .............................................................................................................. 26

Table 6: DDR3 Input/Output Capacitance ...................................................................................................... 27

Table 7: Thermal Characteristics .................................................................................................................... 28

Table 8: Timing Parameters Used for IDD Measurements – Clock Units ............................................................ 30

Table 9: IDD0 Measurement Loop ................................................................................................................... 31

Table 10: IDD1 Measurement Loop .................................................................................................................. 32

Table 11: IDD Measurement Conditions for Power-Down Currents ................................................................... 33

Table 12: IDD2N and IDD3N Measurement Loop ................................................................................................ 34

Table 13: IDD2NT Measurement Loop .............................................................................................................. 34

Table 14: IDD4R Measurement Loop ................................................................................................................ 35

Table 15: IDD4W Measurement Loop ............................................................................................................... 36

Table 16: IDD5B Measurement Loop ................................................................................................................ 37

Table 17: IDD Measurement Conditions for IDD6, IDD6ET, and IDD8 .................................................................... 38

Table 18: IDD7 Measurement Loop .................................................................................................................. 39

Table 19: IDD Maximum Limits – Die Rev D ..................................................................................................... 41

Table 20: IDD Maximum Limits – Die Rev M .................................................................................................... 42

Table 21: IDD Maximum Limits – Die Rev K ..................................................................................................... 43

Table 22: DC Electrical Characteristics and Operating Conditions ................................................................... 44

Table 23: DC Electrical Characteristics and Input Conditions .......................................................................... 44

Table 24: Input Switching Conditions ............................................................................................................. 45

Table 25: Control and Address Pins ................................................................................................................ 47

Table 26: Clock, Data, Strobe, and Mask Pins .................................................................................................. 47

Table 27: Differential Input Operating Conditions (CK, CK# and DQS, DQS#) .................................................. 48

Table 28: Allowed Time Before Ringback (tDVAC) for CK - CK# and DQS - DQS# ............................................... 50

Table 29: Single-Ended Input Slew Rate Definition .......................................................................................... 51

Table 30: Differential Input Slew Rate Definition ............................................................................................. 53

Table 31: On-Die Termination DC Electrical Characteristics ............................................................................ 54

Table 32: RTT Effective Impedances ................................................................................................................ 55

Table 33: ODT Sensitivity Definition .............................................................................................................. 56

Table 34: ODT Temperature and Voltage Sensitivity ........................................................................................ 56

Table 35: ODT Timing Definitions .................................................................................................................. 57

Table 36: Reference Settings for ODT Timing Measurements ........................................................................... 57

Table 37: 34 Ohm Driver Impedance Characteristics ....................................................................................... 61

Table 38: 34 Ohm Driver Pull-Up and Pull-Down Impedance Calculations ....................................................... 62

Table 39: 34 Ohm Driver IOH/IOL Characteristics: VDD = VDDQ = 1.5V ................................................................ 62

Table 40: 34 Ohm Driver IOH/IOL Characteristics: VDD = VDDQ = 1.575V ............................................................. 62

Table 41: 34 Ohm Driver IOH/IOL Characteristics: VDD = VDDQ = 1.425V ............................................................. 63

Table 42: 34 Ohm Output Driver Sensitivity Definition .................................................................................... 63

Table 43: 34 Ohm Output Driver Voltage and Temperature Sensitivity .............................................................. 63

Table 44: 40 Ohm Driver Impedance Characteristics ....................................................................................... 64

Table 45: 40 Ohm Output Driver Sensitivity Definition .................................................................................... 64

Table 46: 40 Ohm Output Driver Voltage and Temperature Sensitivity .............................................................. 65

Table 47: Single-Ended Output Driver Characteristics ..................................................................................... 66

Table 48: Differential Output Driver Characteristics ........................................................................................ 67

Table 49: Single-Ended Output Slew Rate Definition ....................................................................................... 69

Table 50: Differential Output Slew Rate Definition .......................................................................................... 70

PDF: 09005aef826aaadc

2Gb_DDR3_SDRAM.pdf - Rev. Q 04/13 EN

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