X24641S8 Просмотр технического описания (PDF) - Xicor -> Intersil
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X24641S8 Datasheet PDF : 13 Pages
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X24641
Bus Timing
SCL
SDA IN
tSU:STA
tF
tHIGH
tLOW
tHD:STA tHD:DAT
t SU:DAT
tR
t SU:STO
tAA
t DH
t BUF
SDA OUT
Program Cycle Limits
7026 FM 14
Symbol
Parameter
Min.
Typ.(7)
Max.
Units
TWR(8)
Program Cycle Time
5
10
ms
7026 FRM T11
Notes: (7) Typical values are for TA = 25°C and nominal supply voltage (5V).
(8) tWR is the minimum cycle time to be allowed from the system perspective unless polling techniques are used. It is the maximum
time the device requires to automatically complete the nonvolatile write operation.
The program cycle time is the time from a valid stop condition of a program sequence to the end of the internal
erase/program cycle. During the program cycle, the X24641 bus interface circuits are disabled, SDA is allowed to
remain HIGH, and the device does not respond to its slave address.
Bus Timing
SCL
SDA
8th BIT
WORD n
ACK
ST OP
CONDITION
t WR
START
CONDITION
Guidelines for Calculating Typical Values of
Bus Pull-Up Resistors
120
100
RMIN
=
VCC MAX
IOL MIN
=1.8KΩ
80
RMAX
=
tR
CBUS
60
MAX.
RESISTANCE
40
20 MIN.
RESISTANCE
0
0 20 40 60
80 100 120
BUS CAPACITANCE (pF)
7026 FM 16
SYMBOL TABLE
WAVEFORM
INPUTS
Must be
steady
May change
from Low to
High
May change
from High to
Low
Don’t Care:
Changes
Allowed
N/A
7026 FM 15
OUTPUTS
Will be
steady
Will change
from Low to
High
Will change
from High to
Low
Changing:
State Not
Known
Center Line
is High
Impedance 7026 FM 17
11
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