MSM7650 Просмотр технического описания (PDF) - Oki Electric Industry

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Компоненты Описание

производитель

MSM7650

NTSC/PAL Digital Encoder

Oki Electric Industry 

¡ Semiconductor

MSM7650

Input timing

Output timing

 CLKX1

RESET_L, HSYNC_L, VSYNC_L,

YD[7:0], CD[7:0], MS, MODE[2:0],

INTERLACE, OLR, OLG, OLB,

OLC

HSYNC_L, VSYNC_L

ts1

valid

th1

invalid

td1

valid

CLKX2

CLKX2O

SCL

td2

tC_SCL

tL_SCL

SDA

The phase relations between CLKX1 and CLKX2 are shown below.

1.

When the CLKX1 pulse rises later than the CLKX2 pulse.

CLKX2

Tccd1

CLKX1

2.

When the CLKX1 pulse rises earlier than the CLKX2 pulse.

Tccd1: 20.14 [ns]

Tccd2: 3.27 [ns]

CLKX2

CLKX1

Tccd2

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