MSM7564-01
¡ Semiconductor
PIN DESCRIPTIONS
System and Clock
Symbol
MCK
RST
SLEEP
CKOEN
CPUCLK
GACLK
Type
Description
I Master Clock Input
Frequency of 3.888 MHz ±100 ppm, with a duty ratio of between 45 and 55%.
I Reset Input
'0' : reset state, '1' : normal operation
I Sleep Input
'0' : sleep state, '1' : normal operation
I Clock Output Enable
'0' : CPUCLK and GACLK pins are enabled to output.
(Internal PLL operates normally in sleep state.)
'1' : CPUCLK and GACLK pins are disabled to output.
(Internal PLL turns to be power down in sleep state.)
O CPU Clock Output
CPUCLK outputs a 15.552 MHz clock for external CPU.
O Gate Array Clock Output
GACLK outputs a 13.824 MHz clock for external gate array.
Modem Digital Interface
Symbol
ST1
ST2
RT
STD
SRD
Type
Description
I External Transmit Clock Input
An external transmit clock provided to input to ST1. The clock frequency of 300 to
14400 Hz is supplied by the local DTE.
O Internal Transmit Clock Output
ST2 outputs the transmitting data clock of between 300 and 14400 Hz selected by
modem mode.
O Internal Receive Clock Output
RT outputs the receiving data clock of between 300 and 14400 Hz selected by modem
mode.
I Transmit Data Serial Input
STD inputs the transmit serial data synchronized with either internal timing selected by
modem mode or ST1 / ST2.
O Received Data Serial Output
SRD outputs the received serial data synchronized with either internal timing selected
by modem mode or RT.
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