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MSM66P509 Просмотр технического описания (PDF) - Oki Electric Industry

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производитель
MSM66P509
OKI
Oki Electric Industry OKI
MSM66P509 Datasheet PDF : 24 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
¡ Semiconductor
MSM66509/66P509
PIN DESCRIPTION (Continued)
Symbol
AI0-AI15
AVDD
VREF
AGND
OSC0
OSC1
ALE
PSEN
OE
NMI
RES
EA
VDD
GND
Type
I
I
I
I
I
O
O
O
I
I
I
I
I
I
Description
Analog signal input pin for A/D converter
Power supply input pin for A/D converter
Reference voltage input pin for A/D converter
GND input pin for A/D converter
Basic clock oscillation pin
Basic clock oscillation pin
Timing pulse output pin to latch the lower 8 bits of the address output from port
0 when the CPU accesses the external memory
Strobe pulse output pin to fetch to external program memory
When P0, P1, P7.4-P7.7, and P8-P11 are in an output state and OE pin is "H"
level, the ports go to a high-impedance state.
When P0, P1, P7.4-P7.7, and P8-P11 are in an output state and OE pin is "L"
level, the ports output "H" or "L" level.
However, when P0, P1, P7.4-P7.7, and P8-P11 are in an input state, these ports
are not under the influence of OE pin.
Nonmaskable interrupt request input pin
Low-active RESET input pin
Normally set to "H" level. If set to "L" level, the program memory goes into
external access mode and accesses external program memory
Power supply pin
Ground pin
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