MSM66G101VS Просмотр технического описания (PDF) - Oki Electric Industry

Номер в каталоге

Компоненты Описание

производитель

MSM66G101VS

OLMS-66K Series 16-Bit Microcontroller

Oki Electric Industry 

¡ Semiconductor

MSM66101

PIN DESCRIPTIONS (Continued)

Symbol

RESOUT

ALE

PSEN

RD

WR

READY

EA

FLT

RES

OSC0

OSC1

NMI

VREF

AGND

VDD

GND

Type

O

O

O

O

O

I

I

I

I

I

O

I

I

I

I

I

Description

Outputs 'H' level when the CPU is in RESET status.

Reset to 'L' level in some programs.

Address Latch Enable:

The timing pulse to latch the lower 8 bits of the address

output from port 0 when the CPU accesses the external

memory.

Program Store Enable: The strobe pulse to fetch to external program

memory.

Output strobe activated during a bus read cycle.

Used to enable data on to the bus from the external data memory.

Output strobe during a bus write cycle.

Used as write strobe to external data memory.

Used when the CPU accesses low speed peripherals.

Normally set to 'H' level.

If set to 'L' level, the CPU fetches the code from external program memory.

If FLT is 'H' level, ALE, WR, RD, PSEN are set to 'H' level when reset.

If FLT is set to 'L', ALE, WR, RD, PSEN are set to floating level when reset.

RESET input pin.

Clock oscillation pins

Nonmaskable interrupt input pin (falling edge)

Reference voltage input pin for A/D converter.

Ground for A/D converter.

System power supply.

Ground.

8/28

Share Link: