M27C64A-10K1 Просмотр технического описания (PDF) - STMicroelectronics

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M27C64A-10K1

64 Kbit (8Kb x8) UV EPROM and OTP EPROM

STMicroelectronics 

Device operation

2

Device operation

M27C64A

The modes of operation of the M27C64A are listed in the Operating Modes table. A single

power supply is required in the read mode. All inputs are TTL levels except for VPP and 12V

on A9 for Electronic Signature.

2.1

Read mode

The M27C64A has two control functions, both of which must be logically active in order to

obtain data at the outputs. Chip Enable (E) is the power control and should be used for

device selection. Output Enable (G) is the output control and should be used to gate data to

the output pins, independent of device selection. Assuming that the addresses are stable,

the address access time (tAVQV) is equal to the delay from E to output (tELQV). Data is

available at the output after a delay of tGLQV from the falling edge of G, assuming that E has

been low and the addresses have been stable for at least tAVQV-tGLQV.

2.2

Standby mode

The M27C64A has a standby mode which reduces the active current from 30mA to 100µA.

The M27C64A is placed in the standby mode by applying a CMOS high signal to the E input.

When in the standby mode, the outputs are in a high impedance state, independent of the G

input.

2.3

Two Line output control

Because EPROMs are usually used in larger memory arrays, this product features a 2 line

control function which accommodates the use of multiple memory connection. The two line

control function allows:

● The lowest possible memory power dissipation

● Complete assurance that output bus contention will not occur

For the most efficient use of these two control lines, E should be decoded and used as the

primary device selecting function, while G should be made a common connection to all

devices in the array and connected to the READ line from the system control bus. This

ensures that all deselected memory devices are in their low power standby mode and that

the output pins are only active when data is required from a particular memory device.

2.4

System considerations

The power switching characteristics of Advanced CMOS EPROMs require careful

decoupling of the devices. The supply current, ICC, has three segments that are of interest to

the system designer: the standby current level, the active current level, and transient current

peaks that are produced by the falling and rising edges of E. The magnitude of the transient

current peaks is dependent on the capacitive and inductive loading of the device at the

output. The associated transient voltage peaks can be suppressed by complying with the

two line output control and by properly selected decoupling capacitors. It is recommended

that a 0.1µF ceramic capacitor be used on every device between VCC and VSS. This should

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