MPC958 Просмотр технического описания (PDF) - Motorola => Freescale
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MPC958 Datasheet PDF : 8 Pages
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Freescale Semiconductor, Inc.
MPC958
DC CHARACTERISTICS (TA = 0° to 70°C, VCC = 3.3V ±5%)
Symbol
Characteristic
Min
Typ
Max
Unit
Condition
VIH
Input HIGH Voltage LVCMOS Inputs
2.0
3.6
V
VIL
VPP
VCMR
Input LOW Voltage LVCMOS Inputs
Peak–to–Peak Input Voltage PECL_CLK
300
Common Mode Range
PECL_CLK
1.0
0.8
1000
3.0
V
mV
V Note 1.
VOH
Output HIGH Voltage
2.4
V
IOH = –20mA, Note 2.
VOL
Output LOW Voltage
0.5
V
IOL = 20mA, Note 2.
IIN
Input Current
±120
µA
CIN
Input Capacitance
4
pF
Cpd
Power Dissipation Capacitance
25
pF Per Output
ICC
Maximum Quiescent Supply Current
75
mA All VCC Pins
ICCPLL
Maximum PLL Supply Current
15
20
mA VCCA Pin Only
1. VCMR is the center of the differential input signal. Normal operation is obtained when the input crosspoint is within the VCMR range and the input
swing lies within the VPP specification.
2. The MPC958 outputs can drive series or parallel terminated 50Ω (or 50Ω to VCC/2) transmission lines on the incident edge (see Applications
Info section).
PLL INPUT REFERENCE CHARACTERISTICS (TA = 0 to 70°C)
Symbol
Characteristic
Min
Max
fref
Reference Input Frequency
Note 3.
Note 3.
frefDC
Reference Input Duty Cycle
25
75
3. Maximum and minimum input reference is limited by the VCO lock range and the feedback divider.
Unit
MHz
%
Condition
AC CHARACTERISTICS (TA = 0°C to 70°C, VCC = 3.3V ±5%)
Symbol
Characteristic
Min
Typ
Max
Unit
Condition
tr, tf
Output Rise/Fall Time
0.10
1.0
ns 0.8 to 2.0V
Note 4.
tpw
Output Duty Cycle
PLL Mode tcycle/2 –
400
tcycle/2 + ps Note 4.
400
tsk(O)
fVCO
fmax
Output–to–Output Skews (Relative to QFB)
PLL VCO Lock Range
200
Maximum Output Frequency
(Note 4.)
PLL Mode
50
PLL Mode
100
Bypass Mode
200
ps Note 4.
400
MHz
100
MHz VCO_SEL = ‘1’
200
VCO_SEL = ‘0’
200
tpd(lock)
Input to Ext_FB Delay (with PLL Locked @ 100MHz)
–70
tpd(bypass) Input to Q Delay
3.0
tPLZ,HZ
Output Disable Time
tPZL
Output Enable Time
tjitter
Cycle–to–Cycle Jitter (Peak–to–Peak)
tlock
Maximum PLL Lock Time
W 4. Termination of 50 to VCC/2.
130
ps Note 4.
7.0
ns PLL Bypassed
7
ns
6
ns
100
ps Note 4.
10
ms
ECLinPS and ECLinPS Lite
DL140 — Rev 3
For More Information On This Product,
Go to: ww3w.freescale.com
MOTOROLA
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