MPC7455 Просмотр технического описания (PDF) - Freescale Semiconductor
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MPC7455 Datasheet PDF : 64 Pages
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General Parameters
Table 1. Microarchitecture Comparison (continued)
Microarchitectural Specs
MPC7455/MPC7445
MPC7450/MPC7451/
MPC7441
MPC7400/MPC7410
Cache level
Size/associativity
Access width
Number of 32-byte sectors/line
Parity
L2
L2
256-Kbyte/8-Way
256-Kbyte/8-Way
256 Bits
256 Bits
2
2
Byte
Byte
Off-Chip Cache Support 2
L2 tags and controller
only (see off-chip cache
support below)
Cache level
On-chip tag logical size
Associativity
Number of 32-byte sectors/line
Off-chip data SRAM support
Data path width
Direct mapped SRAM sizes
L3
L3
1MB, 2MB
1MB, 2MB
8-Way
8-Way
2, 4
2, 4
MSUG2 DDR, LW, PB2 MSUG2 DDR, LW, PB2
64
64
1 Mbyte, 2 Mbytes
1 Mbyte, 2 Mbytes
Parity
Byte
Notes:
1. Numbers in parentheses are for 2:1 SRAM.
2. Not implemented on MPC7445 or MPC7441.
3. Private memory feature not implemented on MPC7400.
Byte
L2
0.5MB, 1MB, 2MB
2-Way
1, 2, 4
LW, PB2, PB3
64
0.5 Mbyte, 1 Mbyte,
2 Mbytes 3
Byte
4 General Parameters
The following list provides a summary of the general parameters of the MPC7455:
Technology
Die size
0.18 µ m CMOS, six-layer metal
8.69 mm × 12.17 mm (106 mm2)
Transistor count
33 million
Logic design
Fully-static
Packages
MPC7445: Surface mount 360 ceramic ball grid array (CBGA)
MPC7455: Surface mount 483 ceramic ball grid array (CBGA)
Core power supply
1.3 V ± 50 mV DC nominal
I/O power supply
1.8 V ± 5% DC, or
2.5 V ± 5% DC, or
1.5 V ± 5% DC (L3 interface only)
MPC7455 RISC Microprocessor Hardware Specifications, Rev. 4.1
Freescale Semiconductor
9
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