ML674000 Просмотр технического описания (PDF) - Oki Electric Industry

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производитель

ML674000

32-bit General-purpose, ARM-based Microcontroller

Oki Electric Industry 

OKI Semiconductor

FEDL674000-02

ML674000

Pin Number

Primary Function

Secondary Function

TQFP LFBGA Pin Name I/O

Function

82 G13 GND_CORE GND Core ground

83 F11 VDD_CORE VDD Core power supply

84 F10

XA[13]

O External address output

Pin Name I/O

—

—

—

—

—

—

Function

85 F12

86 E12

87 F13

XA[14]

XA[15]

XA[16]

O External address output

O External address output

O External address output

—

—

—

—

—

—

88 E10

89 D12

90 E13

XA[17]

GND_IO

XA[18]

O External address output

GND I/O ground

O External address output

—

—

—

—

—

—

91 E11 PIOA[10] I/O General-purpose port (with interrupt function) XA[19]

O External address output

92 D11 PIOA[11] I/O General-purpose port (with interrupt function) XA[20]

O External address output

93 D13 PIOA[12] I/O General-purpose port (with interrupt function) XA[21]

94 C12 VDD_IO VDD I/O power supply

—

O External address output

—

95 D10 PIOA[13] I/O General-purpose port (with interrupt function) XA[22]

O External address output

96 B12 PIOA[14] I/O General-purpose port (with interrupt function) XA[23]

O External address output

97 A12 PIOA[15] I/O General-purpose port (with interrupt function)

98 A11

XOE_N

O Output enable (except SDRAM)

XWR

—

O External bus data transfer direction

—

99 C10

100 B11

XWE_N

GND_IO

O Write enable

GND I/O ground

—

—

—

—

101 A10 XBWE_N[0] O Write enable (LSB)

102 C9 XBWE_N[1] O Write enable (MSB)

103 B10 XROMCS_N O External ROM chip select

104 A9 XRAMCS_N O External RAM chip select

—

—

—

—

—

—

105 D9 XIOCS_N[0] O I/O bank 0 chip select

106 B9 XIOCS_N[1] O I/O bank 1 chip select

107 A8 GND_CORE GND Core ground

—

—

—

—

—

—

108 B8 VDD_CORE VDD Core power supply

—

—

109 D8

PIOB[0] I/O General-purpose port (with interrupt function) DREQ0

I DMA request signal (Ch 0)

110 C8

PIOB[1] I/O General-purpose port (with interrupt function) DREQCLR0 O DREQ clear signal (Ch 0)

111 B7

VDD_IO VDD I/O power supply

—

—

112 D7

PIOB[2] I/O General-purpose port (with interrupt function) DREQ1

I DMA request signal (Ch 1)

113 C7

PIOB[3] I/O General-purpose port (with interrupt function) DREQCLR1 O DREQ clear signal (Ch 1)

114 A7

PIOB[4] I/O General-purpose port (with interrupt function) TCOUT0 O DMA Termination Signal (CH 0)

115 C6

116 D6

PIOB[5]

GND_IO

I/O General-purpose port (with interrupt function)

GND I/O ground

TCOUT1

—

O DMA Termination Signal (CH 1)

—

117 B6

PIOB[6] I/O General-purpose port (with interrupt function) PWMOUT0 O PWM output (Ch 0)

118 B5

119 A6

PIOB[7]

XBS_N[0]

I/O General-purpose port (with interrupt function) PWMOUT1

O External bus byte select (LSB)

—

O PWM output (Ch 1)

—

120 D5 XBS_N[1] O External bus byte select (MSB)

—

—

121 B4

PIOB[8] I/O General-purpose port (with interrupt function) XWAIT

I WAIT input for IO bank 0

122 A5

PIOB[9] I/O General-purpose port (with interrupt function) XCAS_N O Column address strobe (SDRAM)

123 C5 PIOB[10] I/O General-purpose port (with interrupt function) XRAS_N O Row address strobe (SDRAM/EDO)

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