ML2724 Просмотр технического описания (PDF) - Micro Linear Corporation

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производитель

ML2724

2.4GHz Low-IF 1.5Mbps FSK Transceiver

Micro Linear Corporation 

ML2724

21 TXO

22 TXOB

DATA

7 AOUT

O (Analog)

O (Analog)

TX RF open-collector output. This output

requires a DC path to VCCA.

Complementary TX RF open-collector

output. This output requires a DC path to

VCCA. For single-ended output

applications, this pin should be

connected to a dummy load that includes

a DC path to VCCA.

TXO

21

TXOB

22

18

GNDRF

A (Analog)

Multi-function Output. In Analog output

mode this is output drives an off chip

data slicer. In Transmit power control

mode this is an open drain output, which

is pulled low when the TPC bit is serial

register #1, is clear. Transitions on TPC

are synchronized to the falling edge of

RXON. In analog test modes this pin and

the RSSI output become test access

points controlled by the serial control

bus.

TPQ

MUX

VDD

31

TPC

TPC

MUX

100Ω

7 AOUT

8

8

VSS

VSS

AOUT

MUX

30 DIN

32 DOUT

I (CMOS)

O (CMOS)

Transmit Data Input. Drives the transmit

pulse shaping circuits. Serial digital data

on this pin becomes FSK modulation on

the Transmit RF output. The logic timing

on this pin controls data timing. Internal

circuits determine the modulation

deviation. This is a standard CMOS input

referenced to VDD and VSS.

Serial digital output after demodulation,

chip rate filtering and center data slicing.

A CMOS level output (VSS to VDD) with

controlled slew rates. A low drive output

designed to drive a PCB trace and a

CMOS logic input while generating

minimal RFI. In digital test modes this pin

becomes a test access port controlled by

the serial control bus.

See Pin 1 below.

250Ω

VDD

31

32 DOUT

8 VSS

DS2724-F-03

FINAL DATASHEET

DECEMBER 2005 9

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