MFRC52301HN1/TRAYB Просмотр технического описания (PDF) - NXP Semiconductors.
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MFRC52301HN1/TRAYB Datasheet PDF : 98 Pages
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NXP Semiconductors
MFRC523
Contactless reader IC
ISO/IEC 14443 A framing at 106 kBd
start
8-bit data
start bit is 1
odd
parity
8-bit data
odd
parity
8-bit data
odd
parity
ISO/IEC 14443 A framing at 212 kBd, 424 kBd and 848 kBd
start
start bit is 0
burst of 32
subcarrier clocks
8-bit data
odd
parity
8-bit data
Fig 6. Data coding and framing according to ISO/IEC 14443 A
odd
parity
8-bit data
even
parity
even parity at the
end of the frame
001aak585
The internal CRC coprocessor calculates the CRC value based on ISO/IEC 14443 A
part 3 and handles parity generation internally according to the transfer speed. Automatic
parity generation can be switched off using the ManualRCVReg register’s ParityDisable
bit.
8.2 ISO/IEC 14443 B functionality
The MFRC523 reader IC fully supports international standard ISO 14443 which includes
communication schemes ISO 14443 A and ISO 14443 B.
Refer to the ISO 14443 reference documents Identification cards - Contactless integrated
circuit cards - Proximity cards (parts 1 to 4).
Remark: NXP Semiconductors does not offer a software library to enable design-in of the
ISO 14443 B protocol.
8.3 Digital interfaces
8.3.1 Automatic microcontroller interface detection
The MFRC523 supports direct interfacing of hosts using SPI, I2C-bus or serial UART
interfaces. The MFRC523 resets its interface and checks the current host interface type
automatically after performing a power-on or hard reset. The MFRC523 identifies the host
interface by sensing the logic levels on the control pins after the reset phase. This is done
using a combination of fixed pin connections. Table 5 shows the different connection
configurations.
MFRC523_33
Product data sheet
PUBLIC
Table 5.
Pin
SDA
I2C
EA
D7
Connection protocol for detecting different interface types
Interface type
UART (input)
SPI (output)
I2C-bus (I/O)
RX
NSS
SDA
0
0
1
0
1
EA
TX
MISO
SCL
All information provided in this document is subject to legal disclaimers.
Rev. 3.3 — 5 March 2010
115233
© NXP B.V. 2010. All rights reserved.
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