MFRC52301HN1/TRAYB Просмотр технического описания (PDF) - NXP Semiconductors.
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MFRC52301HN1/TRAYB Datasheet PDF : 98 Pages
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NXP Semiconductors
MFRC523
Contactless reader IC
8.3.4.7 Register read access
To read out data from a specific register address in the MFRC523, the host controller must
use the following procedure:
• Firstly, a write access to the specific register address must be performed as indicated
in the frame that follows
• The first byte of a frame indicates the device address according to the I2C-bus rules
• The second byte indicates the register address. No data bytes are added
• The Read/Write bit is 0
After the write access, read access can start. The host sends the device address of the
MFRC523. In response, the MFRC523 sends the content of the read access register. In
one frame all data bytes can be read from the same register address. This enables fast
FIFO buffer access or register polling.
The Read/Write (R/W) bit is set to logic 1.
write cycle
S
I2C-BUS
SLAVE ADDRESS
[A7:A0]
0
(W) A
0
0
JOINER REGISTER
A
[0:n]
DATA
A
ADDRESS [A5:A0]
[7:0]
P
read cycle
I2C-BUS
0
S
SLAVE ADDRESS
(W) A
[A7:A0]
0
0
JOINER REGISTER
A
ADDRESS [A5:A0]
P
optional, if the previous access was on the same register address
[0:n]
S
I2C-BUS
SLAVE ADDRESS
[A7:A0]
1
(R)
A
[0:n]
DATA
A
[7:0]
sent by master
sent by slave
Fig 17. Register read and write access
DATA
A
P
[7:0]
S start condition
P stop condition
A acknowledge
A not acknowledge
W write cycle
R read cycle
001aak592
MFRC523_33
Product data sheet
PUBLIC
All information provided in this document is subject to legal disclaimers.
Rev. 3.3 — 5 March 2010
115233
© NXP B.V. 2010. All rights reserved.
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