MFRC52301HN1/TRAYB Просмотр технического описания (PDF) - NXP Semiconductors.
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MFRC52301HN1/TRAYB Datasheet PDF : 98 Pages
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NXP Semiconductors
MFRC523
Contactless reader IC
Remark: Signals DTRQ and MX can be disabled by clearing TestPinEnReg register’s
RS232LineEn bit.
8.3.3.2 Selectable UART transfer speeds
The internal UART interface is compatible with an RS232 serial interface.
The default transfer speed is 9.6 kBd. To change the transfer speed, the host controller
must write a value for the new transfer speed to the SerialSpeedReg register. Bits
BR_T0[2:0] and BR_T1[4:0] define the factors for setting the transfer speed in the
SerialSpeedReg register.
The BR_T0[2:0] and BR_T1[4:0] settings are described in Table 9. Examples of different
transfer speeds and the relevant register settings are given in Table 10.
Table 9. BR_T0 and BR_T1 settings
BR_Tn
Bit 0 Bit 1 Bit 2 Bit 3 Bit 4 Bit 5 Bit 6 Bit 7
BR_T0 factor
1
1
2
4
8
16
32
64
BR_T1 range
1 to 32 33 to 64 33 to 64 33 to 64 33 to 64 33 to 64 33 to 64 33 to 64
Table 10. Selectable UART transfer speeds
Transfer speed (kBd)
SerialSpeedReg value
Decimal Hexadecimal
7.2
250
FAh
9.6
235
EBh
14.4
218
DAh
19.2
203
CBh
38.4
171
ABh
57.6
154
9Ah
115.2
122
7Ah
128
116
74h
230.4
90
5Ah
460.8
58
3Ah
921.6
28
1Ch
1228.8
21
15h
Transfer speed accuracy (%)[1]
−0.25
0.32
−0.25
0.32
0.32
−0.25
−0.25
−0.06
−0.25
−0.25
1.45
0.32
[1] The resulting transfer speed error is less than 1.5 % for all described transfer speeds.
The selectable transfer speeds shown in Table 10 are calculated according to the
following equations:
If BR_T0[2:0] = 0:
transfer speed = ---2---7---.-1---2-----×----1---0----6--
(1)
(BR_T0 + 1)
If BR_T0[2:0] > 0:
MFRC523_33
Product data sheet
PUBLIC
All information provided in this document is subject to legal disclaimers.
Rev. 3.3 — 5 March 2010
115233
© NXP B.V. 2010. All rights reserved.
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