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MT90210 Просмотр технического описания (PDF) - Mitel Networks

Номер в каталоге
Компоненты Описание
производитель
MT90210
Mitel
Mitel Networks Mitel
MT90210 Datasheet PDF : 27 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
MT90210
Preliminary Information
A6
A7
VSS
A8
A9
VDD
A10
VSS
A11
A12
RBC
VDD
VSS
WBC
S0
S1
S2
VSS
VDD
S3
80 78 76 74 72 70 68 66 64 62 60 58 56 54 52 50
82
48
84
46
86
44
88
42
90
92
100 PIN PQFP
40
38
94
36
96
34
98
32
100 2
4
6
8 10 12 14 16 18 20 22 24 26 28 30
PLLAGND
LP1
LP2
PLLVSS
IDDTN
TD
VSS2
C16-
C16+
VDD2
MD0
MD1
MD2
F0i
TRST
TCK
TMS
TDI
HC4
SCLK
Note: the PQFP package meets the JEDEC standard MO-108, CC1.
Critical dimensions:
Lead pitch = 0.65mm,
Body Size = 14mm x 20mm,
Package size = 17.9mm x 23.9mm.
Figure 2 - Pin Connections
Pin Description
Pin
Name
Description
95-97,
100,
1-3,
6
7-9,
11-15
18-22,
24-26
27
29
30
S0-S2,
S3,
S4-S6,
S7
Serial Lines 0-7 (TTL compatible with internal pullups in the range 25 - 125k).
Bidirectional, time division multiplexed serial streams. According to mode selected by
MD0-2 inputs, distinct data rates can be selected at the serial port. In mode 3, these lines
are configured as inputs only. In modes 1, 2, 4 and 5, these lines become bidirectional.
S8-S10, Serial Lines 8-15. See description for S0-S7 above. In mode 3, S8-S11 are inputs and
S11-S15 S12-S15 are outputs. In modes 1, 2, 4 and 5 these are bidirectional lines.
S16-S20 Serial Lines 16-23. See descripton for S0 - S7 above. For mode 3, these lines are outputs
S21-S23 and operate at 8.192 Mb/s rates. When operating in modes 1, 2, 4 and 5, these lines are
bidirectional.
TDO Boundary Scan Test Data Output.
RDin Read P0-P7 input clock. This input is used by the MT90210 to sample bytes coming in at
the parallel port P0-P7 lines. Typically, the user should connect CKout to this input.
OEser
Serial Port Output Enable (Input). On the parallel-to serial conversion direction, this input
is used by the MT90210 to know which time-slots on the serial output streams will be
placed in high-impedance. This input is sampled synchronously along with the parallel
input data before the parallel-to-serial conversion takes place. When low, output serial
channels are actively driven. When set high, the output bus drivers are disabled.
2-146

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