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MCP3906AT-ISS

Energy Metering ICs with Active Real Power Pulse Output

Microchip Technology 

MCP3905A/05L/06A

3.0 PIN DESCRIPTIONS

The descriptions of the pins are listed in Table 3-1.

TABLE 3-1: PIN FUNCTION TABLE

Pin No.

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

Symbol

DVDD

HPF

AVDD

NC

CH0+

CH0-

CH1-

CH1+

MCLR

REFIN/OUT

AGND

F2

F1

F0

G1

G0

OSC1

OSC2

NC

NEG

DGND

HFOUT

FOUT1

FOUT0

Function

Digital Power Supply Pin

High-Pass Filters Control Logic Pin

Analog Power Supply Pin

No Connect

Non-Inverting Analog Input Pin for Channel 0 (Current Channel)

Inverting Analog Input Pin for Channel 0 (Current Channel)

Inverting Analog Input Pin for Channel 1 (Voltage Channel)

Non-Inverting Analog Input Pin for Channel 1 (Voltage Channel)

Master Clear Logic Input Pin

Voltage Reference Input/Output Pin

Analog Ground Pin, Return Path for internal analog circuitry

Frequency Control for HFOUT Logic Input Pin

Frequency Control for FOUT0/1 Logic Input Pin

Frequency Control for FOUT0/1 Logic Input Pin

Gain Control Logic Input Pin

Gain Control Logic Input Pin

Oscillator Crystal Connection Pin or Clock Input Pin

Oscillator Crystal Connection Pin or Clock Output Pin

No Connect

Negative Power Logic Output Pin

Digital Ground Pin, Return Path for Internal Digital Circuitry

High-Frequency Logic Output Pin (Intended for Calibration)

Differential Mechanical Counter Logic Output Pin

Differential Mechanical Counter Logic Output Pin

3.1 Digital VDD (DVDD)

DVDD is the power supply pin for the digital circuitry

within the MCP3905A/05L/06A devices.

This pin requires appropriate bypass capacitors and

should be maintained to 5V ±10% for specified

operation. Refer to Section 5.0 “Applications

Information”.

3.2 High-Pass Filter Input Logic Pin

(HPF)

HPF controls the state of the high-pass filter in both

input channels. A logic ‘1’ enables both filters,

removing any DC offset coming from the system or the

device. A logic ‘0’ disables both filters allowing DC

voltages to be measured.

3.3 Analog VDD (AVDD)

AVDD is the power supply pin for the analog circuitry

within the MCP3905A/05L/06A devices.

This pin requires appropriate bypass capacitors and

should be maintained to 5V ±10% for specified

operation. Refer to Section 5.0 “Applications

Information”.

3.4 Current Channel (CH0-, CH0+)

CH0- and CH0+ are the fully differential analog voltage

input channels for the current measurement, containing

a PGA for small-signal input, such as shunt current

sensing. The linear and specified region of this channel

is dependant on the PGA gain. This corresponds to a

maximum differential voltage of ±470 mV/GAIN and

maximum absolute voltage, with respect to AGND, of

±1V. Up to ±6V can be applied to these pins without the

risk of permanent damage.

Refer to Section 1.0 “Electrical Characteristics”.

DS22011A-page 10

© 2006 Microchip Technology Inc.

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