MCM6949YJ10 Просмотр технического описания (PDF) - Motorola => Freescale
Номер в каталоге
Компоненты Описание
производитель
MCM6949YJ10 Datasheet PDF : 10 Pages
| |||
WRITE CYCLE 1 (W Controlled; See Notes 1, 2, and 3)
MCM6949–8 MCM6949–10 MCM6949–12 MCM6949–15
Parameter
Symbol Min Max Min Max Min Max Min Max Unit Notes
Write Cycle Time
tAVAV
8
—
10
—
12
—
15
—
ns
4
Address Setup Time
tAVWL
0
—
0
—
0
—
0
—
ns
Address Valid to End of Write
tAVWH
8
—
9
—
10
—
12
—
ns
Address Valid to End of Write (G High) tAVWH
7
—
8
—
9
—
10
—
ns
Write Pulse Width
tWLWH
8
—
9
—
10
—
12
—
ns
tWLEH
Write Pulse Width (G High)
tWLWH
7
—
8
—
9
—
10
—
ns
tWLEH
Data Valid to End of Write
tDVWH
5
—
5
—
6
—
7
—
ns
Data Hold Time
Write Low to Data High–Z
Write High to Output Active
tWHDX
0
—
0
—
0
—
0
—
ns
tWLQZ
0
4
0
5
0
6
0
7
ns 5, 6, 7
tWHQX
3
—
3
—
3
—
3
—
ns 5, 6, 7
Write Recovery Time
tWHAX
0
—
0
—
0
—
0
—
ns
NOTES:
1. A write occurs during the overlap of E low and W low.
2. Product sensitivities to noise require proper grounding and decoupling of power supplies as well as minimization or elimination of bus
contention conditions during read and write cycles.
3. If G goes low coincident with or after W goes low, the output will remain in a high–impedance state.
4. All write cycle timings are referenced from the last valid address to the first transitioning address.
5. Transition is measured ± 200 mV from steady–state voltage.
6. This parameter is sampled and not 100% tested.
7. At any given voltage and temperature, tWLQZ max < tWHQX min, both for a given device and from device to device.
A (ADDRESS)
E (CHIP ENABLE)
W (WRITE ENABLE)
D (DATA IN)
Q (DATA OUT)
WRITE CYCLE 1 (W Controlled; See Notes 1, 2, and 3)
tAVAV
tAVWL
HIGH–Z
tAVWH
tWLWH
tWLEH
tWLQZ
tDVWH
DATA VALID
HIGH–Z
tWHAX
tWHDX
tWHQX
MCM6949
8
MOTOROLA FAST SRAM
Share Link: 