MCIMX35 Просмотр технического описания (PDF) - Freescale Semiconductor

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MCIMX35

i.MX35 Applications Processors for Automotive Products

Freescale Semiconductor 

1.3 Block Diagram

Figure 1 is the i.MX35 simplified interface block diagram.

DDR2/SDDR

RAM

NOR

Flash/

PSRAM

NAND

Flash

Camera

Sensor

LCD Display 1 External Graphics

LCD Display 2 Accelerator

External Memory

Interface (EMI)

Smart

DMA

SPBA

Peripherals

MSHC

ESAI

SPDIF

SSI

UART

ASRC

CSPI

ATA

FEC

3 FuseBox

ARM11

Platform

ARM1136JF-S

VFP

L1 I/D cache

L2 cache

AVIC

MAX

AIPS (2)

ETM

Internal

Memory

Image

Processing Unit

(IPU)

ARM1136 Platform Peripherals

SSI

AUDMUX

I2C(3)

UART(2)

CSPI

CAN(2)

MLB

IIM

RTICv3

RNGC

SCC

KPP

PWM

OWIRE

HS USBOTG

HS USBOTGPHY

HS USBHost

FS USBPHY

GPU 2D

eSDHC(3)

ECT

IOMUX

GPIO(3)

EPIT

Timers

RTC

WDOG

GPT

Audio/Power

Management JTAG

Bluetooth

MMC/SDIO

or WLAN

Keypad

Connectivity

Access

Figure 1. i.MX35 Simplified Interface Block Diagram

2 Functional Description and Application Information

The i.MX35 consists of the following major subsystems:

• ARM1136 Platform—AP domain

• SDMA Platform and EMI—Shared domain

2.1 Application Processor Domain Overview

The applications processor (AP) and its domain are responsible for running the operating system and

applications software, providing the user interface, and supplying access to integrated and external

peripherals. The AP domain is built around an ARM1136JF-S core with 16-Kbyte instruction and data L1

caches, an MMU, a 128-Kbyte L2 cache, a multiported crossbar switch, and advanced debug and trace

interfaces.

i.MX35 Applications Processors for Automotive Products, Rev. 8

Freescale Semiconductor

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