MC68HC11E0 Просмотр технического описания (PDF) - Motorola => Freescale

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MC68HC11E0

M68HC11E Series Programming Reference Guide

Motorola => Freescale 

M68HC11ERG/AD

Interrupt Vector Assignments

Vector

Address

Interrupt

Source

CCR

Local

Mask Bit Mask

FFC0, C1 – FFD4, D5 Reserved

FFD6, D7

SCI serial system(1)

• SCI receive data register full

• SCI receiver overrun

• SCI transmit data register empty

• SCI transmit complete

• SCI idle line detect

—

—

RIE

I

RIE

TIE

TCIE

ILIE

FFD8, D9

SPI serial transfer complete

I

SPIE

FFDA, DB

Pulse accumulator input edge

I

PAII

FFDC, DD

Pulse accumulator overflow

I

PAOVI

FFDE, DF

Timer overflow

I

TOI

FFE0, E1

Timer input capture 4/output compare 5

I

I4/O5I

FFE2, E3

Timer output compare 4

I

OC4I

FFE4, E5

Timer output compare 3

I

OC3I

FFE6, E7

Timer output compare 2

I

OC2I

FFE8, E9

Timer output compare 1

I

OC1I

FFEA, EB

Timer input capture 3

I

IC3I

FFEC, ED

Timer input capture 2

I

IC2I

FFEE, EF

Timer input capture 1

I

IC1I

FFF0, F1

Real-time interrupt

I

RTII

FFF2, F3

IRQ (external pin)

I

None

FFF4, F5

XIRQ pin

X

None

FFF6, F7

Software interrupt

None

None

FFF8, F9

Illegal opcode trap

None

None

FFFA, FB

COP failure

None NOCOP

FFFC, FD

Clock monitor fail

None

CME

FFFE, FF

RESET

None

None

1. Interrupts generated by SCI; read SCSR to determine source. Refer to HPRIO register to

determine priority of interrupt.

4

M68HC11E Series Programming Reference Guide

MOTOROLA

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