MC68030 Просмотр технического описания (PDF) - Motorola => Freescale

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Компоненты Описание

производитель

MC68030

ENHANCED 32-BIT MICROPROCESSOR

Motorola => Freescale 

TABLE OF CONTENTS

Paragraph

Number

1.1

1.2

1.3

1.4

1.5

1.6

1.6.1

1.6.2

1.7

1.8

1.9

2.1

2.2

2.2.1

2.2.2

2.2.3

2.3

2.4

2.4.1

2.4.2

2.4.3

2.4.4

2.4.5

2.4.6

2.4.7

2.4.8

2.4.9

2.4.10

2.4.11

2.4.12

2.4.13

2.4.14

2.4.15

2.4.16

2.4.17

2.4.18

2.5

Title

Page

Number

Section 1

Introduction

Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3

MC68030 Extensions to the M68000 Family . . . . . . . . . . . . . . . . . . . 1-4

Programming Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4

Data Types and Addressing Modes . . . . . . . . . . . . . . . . . . . . . . . . . . 1-10

Instruction Set Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-10

Virtual Memory and Virtual Machine Concepts . . . . . . . . . . . . . . . . . 1-12

Virtual Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-12

Virtual Machine . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-14

The Memory Management Unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-15

Pipelined Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-16

The Cache Memories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-16

Section 2

Data Organization and Addressing Capabilities

Instruction Operands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1

Organization of Data in Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2

Data Registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2

Address Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-4

Control Registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-4

Organization of Data in Memory. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-5

Addressing Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-8

Data Register Direct Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-9

Address Register Direct Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-10

Address Register Indirect Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-10

Address Register Indirect with Postincrement Mode. . . . . . . . . . . . 2-10

Address Register Indirect with Predecrement Mode . . . . . . . . . . . . 2-11

Address Register Indirect with Displacement Mode . . . . . . . . . . . . 2-12

Address Register Indirect with Index (8-Bit Displacement) Mode . . 2-12

Address Register Indirect with Index (Base Displacement) Mode. . 2-13

Memory Indirect Postindexed Mode . . . . . . . . . . . . . . . . . . . . . . . . 2-14

Memory Indirect Preindexed Mode . . . . . . . . . . . . . . . . . . . . . . . . . 2-15

Program Counter Indirect with Displacement Mode . . . . . . . . . . . . 2-16

Program Counter Indirect with Index (8-Bit Displacement) Mode . . 2-16

Program Counter Indirect with Index (Base Displacement) Mode. . 2-17

Program Counter Memory Indirect Postindexed Mode . . . . . . . . . . 2-18

Program Counter Memory Indirect Preindexed Mode . . . . . . . . . . . 2-19

Absolute Short Addressing Mode . . . . . . . . . . . . . . . . . . . . . . . . . . 2-20

Absolute Long Addressing Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . 2-20

Immediate Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-21

Effective Address Encoding Summary . . . . . . . . . . . . . . . . . . . . . . . . 2-22

MOTOROLA

MC68030 USER’S MANUAL

xxv

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