MC56F8245 Просмотр технического описания (PDF) - Freescale Semiconductor

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MC56F8245

Digital Signal Controller

Freescale Semiconductor 

Overview

— Maximum slave module frequency = module clock frequency/2

— 13-bit baud rate divider for low speed communication

• Two inter-integrated circuit (I2C) ports

— Operation at up to 100 kbps

— Support for master and slave operation

— Support for 10-bit address mode and broadcasting mode

— Support for SMBus, Version 2

• One Freescale Scalable Controller Area Network (MSCAN) module

— Fully compliant with CAN protocol Version 2.0 A/B

— Support for standard and extended data frames

— Support for data rate up to 1 Mbit/s

— Five receive buffers and three transmit buffers

• Computer operating properly (COP) watchdog timer capable of selecting different clock sources

— Programmable prescaler and timeout period

— Programmable wait, stop, and partial powerdown mode operation

— Causes loss of reference reset 128 cycles after loss of reference clock to the PLL is detected

— Choice of clock sources from four sources in support of EN60730 and IEC61508:

– On-chip relaxation oscillator

– External crystal oscillator/external clock source

– System clock (IP bus to 60 MHz)

• Power supervisor (PS)

— On-chip linear regulator for digital and analog circuitry to lower cost and reduce noise

— Integrated low voltage detection to generate warning interrupt if VDD is below low voltage detection (LVI)

threshold

— Integrated power-on reset (POR)

– Reliable reset process during power-on procedure

– POR is released after VDD passes low voltage detection (LVI) threshold

— Integrated brown-out reset

— Run, wait, and stop modes

• Phase lock loop (PLL) providing a high-speed clock to the core and peripherals

— 2x system clock provided to Quad Timers and SCIs

— Loss of lock interrupt

— Loss of reference clock interrupt

• Clock sources

— On-chip relaxation oscillator with two user selectable frequencies: 400 kHz for low speed mode, 8 MHz for

normal operation

— External clock: crystal oscillator, ceramic resonator, and external clock source

• Cyclic Redundancy Check (CRC) Generator

— Hardware CRC generator circuit using 16-bit shift register

— CRC16-CCITT compliancy with x16 + x12 + x5 + 1 polynomial

— Error detection for all single, double, odd, and most multi-bit errors

— Programmable initial seed value

— High-speed hardware CRC calculation

— Optional feature to transpose input data and CRC result via transpose register, required on applications where

bytes are in LSb (Least Significant bit) format.

MC56F825x/MC56F824x Digital Signal Controller, Rev. 3

Freescale Semiconductor

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