33991 Просмотр технического описания (PDF) - Motorola => Freescale
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33991 Datasheet PDF : 36 Pages
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Freescale Semiconductor, Inc.
COS0+
1
COS0-
2
SIN0+
3
SIN0-
4
GND
5
GND
6
GND
7
GND
8
CS
9
SCLK
10
SO
11
SI
12
24 COS1+
23 COS1-
22 SIN1+
21 SIN1-
20 GND
19 GND
18 GND
17 GND
16
VPWR
15 RST
14
VDD
13 RTZ
24 Wide Body SOIC
Thermally Enhanced Lead Frame
RJ-LEAD = 15 C/W
Pin Functions
Pin
Number
Pin Name
1
COS0+
2
COS0-
3
SIN0+
4
SIN0-
5-8
GND
9
CS
10
SCLK
11
SO
12
SI
13
RTZ
14
VDD
Description
H-Bridge Output. This is the output pin of a half bridge, designed to source or sink current. The H-Bridge pins
linearly drive the sine and cosine coils of two separate stepper motors to provide four-quadrant operation.
H-Bridge Output. This is the output pin of a half bridge, designed to source or sink current. The H-Bridge pins linearly
drive the sine and cosine coils of two separate stepper motors to provide four-quadrant operation.
H-Bridge Output. This is the output pin of a half bridge, designed to source or sink current. The H-Bridge pins linearly
drive the sine and cosine coils of two separate stepper motors to provide four-quadrant operation.
H-Bridge Output. This is the output pin of a half bridge, designed to source or sink current. The H-Bridge pins linearly
drive the sine and cosine coils of two separate stepper motors to provide four-quadrant operation.
Ground. These pins serve as the ground for the source of the low-side output transistors as well as the logic portion
of the device. They also help dissipate heat from the device.
Chip Select. This pin is connected to a chip select output of a LSI IC. This IC controls which device is addressed by
pulling the CS pin of the desired device low, enabling the SPI communication with the device, while other devices on
the serial link keep their serial outputs tri-stated. This input has an internal active pull-up and requires CMOS logic
levels. This pin is also used to calibrate the internal clock.
Serial Clock. This pin is connected to the SCLK pin of the master device and acts as a bit clock for the SPI port. It
transitions one time per bit transferred at an operating frequency, fSPI, defined in the Coil Output Timing Table. It is
idle between command transfers. The pin is 50 percent duty cycle, with CMOS logic levels. This signal is used to
shift data to and from the device.
Serial Output. This pin is connected to the SPI Serial Data Input pin of the master device, or to the SI pin of the next
device in a daisy chain. This output will remain tri-stated unless the device is selected by a low CS signal. The output
signal generated will have CMOS logic levels and the output data will transition on the rising edges of SCLK. The
serial output data provides status feedback and fault information for each output and is returned MSB first when the
device is addressed.
Serial Input. This pin is connected to the SPI Serial Data Output pin of the master device from which it receives
output command data. This input has an internal active pull-down requiring CMOS logic levels. The serial data
transmitted on this line is a 16-bit control command sent MSB first, controling the gauge functions. The master
ensures data is available on the falling edge of SCLK.
Multiplexed Output. This multiplexed output pin of the non-driven coil during an RTZ event.
Voltage. This SPI and logic power supply input will work with 5.0 V supplies.
MOTOROLA ANALOG INTEGRATED CIRFCoUIrTMDEoVrICeEIDnAfoTArmation On This Product,
Go to: www.freescale.com
33991
3
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