33972 Просмотр технического описания (PDF) - Motorola => Freescale
Номер в каталоге
Компоненты Описание
производитель
33972 Datasheet PDF : 28 Pages
| |||
Freescale Semiconductor, Inc.
DYNAMIC ELECTRICAL CHARACTERISTICS
Characteristics noted under conditions of 3.1 V ≤ VDD ≤ 5.25 V, 8.0 V ≤ VPWR ≤ 16 V, -40°C ≤ TC ≤ 125°C, unless otherwise noted.
Where applicable, typical values reflect the parameter’s approximate average value with VPWR = 13 V, TA = 25°C.
Characteristic
Symbol
Min
Typ
Max
Unit
SWITCH INPUT
Pulse Wetting Current Time
Interrupt Delay Time
Normal Mode
t PULSE (ON)
15
16
20
ms
t INT-DLY
–
µs
5.0
16
Sleep Mode Switch Scan Time
Calibrated Scan Timer Accuracy
Sleep Mode
t SCAN
100
200
300
µs
tSCAN TIMER
–
%
–
10
Calibrated Interrupt Timer Accuracy
Sleep Mode
tINT TIMER
–
%
–
10
DIGITAL INTERFACE TIMING (Note 13)
Required Low-State Duration on VPWR for Reset (Note 14)
VPWR ≤ 0.2 V
Falling Edge of CS to Rising Edge of SCLK
Required Setup Time
t RESET
–
–
t LEAD
100
–
µs
10
ns
–
Falling Edge of SCLK to Rising Edge of CS
Required Setup Time
t LAG
50
–
ns
–
SI to Falling Edge of SCLK
Required Setup Time
t SI (SU)
16
–
ns
–
Falling Edge of SCLK to SI
Required Hold Time
t SI (HOLD)
20
–
ns
–
SI, CS, SCLK Signal Rise Time (Note 15)
t R (SI)
–
5.0
–
ns
SI, CS, SCLK Signal Fall Time (Note 15)
t F (SI)
–
5.0
–
ns
Time from Falling Edge of CS to SO Low Impedance (Note 16)
t SO (EN)
–
–
55
ns
Time from Rising Edge of CS to SO High Impedance (Note 17)
t SO (DIS)
–
–
55
ns
Time from Rising Edge of SCLK to SO Data Valid (Note 18)
t VALID
–
25
55
ns
Notes
13. These parameters are guaranteed by design. Production test equipment uses 4.16 MHz, 5.0 V SPI interface.
14. This parameter is guaranteed by design but not production tested.
15. Rise and Fall time of incoming SI, CS, and SCLK signals suggested for design consideration to prevent the occurrence of double pulsing.
16. Time required for valid output status data to be available on SO terminal.
17. Time required for output states data to be terminated at SO terminal.
18. Time required to obtain valid data out from SO following the rise of SCLK with 200 pF load.
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
For More Information On This Product,
Go to: www.freescale.com
33972
7
Share Link: 