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MC14469P

Addressable Asynchronous Receiver/Transmitter

Motorola => Freescale 

PIN DESCRIPTIONS

A0 – A6

Address Inputs

These inputs are the address setting pins which contain

the address match for the received signal. Pins A0 – A6 have

on–chip pull–up resistors.

C0 – C6

Command Word

These pins are the readout of the general–purpose com-

mand word which is the second word of the received signal.

CS

Command Strobe

This is the output for the command strobe signifying a valid

set of command data (C0 – C6). The pulse width is one oscil-

lator cycle. For example, when a 307.2 kHz ceramic resona-

tor is used, the pulse width is approximately 3 µs.

ID0 – ID7

Input Data Pins

These pins contain the input data for the first eight bits of

data to be transmitted. Pins ID0 – ID7 have on–chip pull–up

resistors.

OSC1, OSC2

Oscillator Input and Oscillator Output

These pins are the oscillator input and output (see

Figure 3).

RESET

Reset

When this pin is pulled low for a minimum of 700 ns, the

circuit is reset and ready for operation.

RI

Receive Input

This is the receive input pin.

S0 – S7

Second or Status Input Data

These pins contain the input data for the second eight bits

of data to be transmitted.

SEND

Send

This pin accepts the send command after receipt of an

address.

TRO

Transmit Register Output Signal

This pin transmits the outgoing signal. Note that it is in-

verted from the incoming signal. It must go through one

stage of inversion if it is to drive another MC14469.

VAP

Valid Address Pulse

This is the output for the valid address pulse upon receipt

of a matched incoming address.

VDD

Positive Power Supply

This pin is the package positive power supply connection.

This pin may range from + 4.5 V to + 18 V with respect to

VSS.

VSS

Negative Power Supply

This pin is the negative power supply connection. Normally

this pin is system ground.

OPERATING CHARACTERISTICS

The receipt of a start bit on the receive input (RI) line

causes the receive clock to start at a frequency equal to that

of the oscillator divided by 64. All received data is strobed in

at the center of a receive clock period. The start bit is fol-

lowed by eight data bits. Seven of the bits are compared

against states of the address of the particular circuit (A0 –

A6). Address is latched 31 clock cycles after the end of the

start bit of the incoming address. The eighth bit signifies an

address word “1” or a command word “0”. Next, a parity bit is

received and checked by the internal logic for even parity.

Finally a stop bit is received. At the completion of the cycle if

the address matches, a valid address pulse (VAP) occurs.

Immediately following the address word, a command word is

received. It also contains a start bit, eight data bits, even par-

ity bit, and a stop bit. The eight data bits are composed of a

seven–bit command, and a “0” which indicates a command

word. At the end of the command word a command strobe

pulse (CS) occurs.

A positive transition on the send input initiates the transmit

sequence. Send must occur within seven bit times of CS.

Again the transmitted data is made up of two eleven–bit

words, i.e., address and command words. The data portion

of the first word is made up from input data inputs (ID0 –

ID7), and the data for the second word from second input

data (S0 – S7) inputs. The data on inputs ID0 – ID7 is latched

one clock before the falling edge of the start bit. The data on

inputs S0 – S7 is latched on the rising edge of the start bit.

The transmitted signal is the inversion of the received signal,

which allows the use of an inverting amplifier to drive the

lines. TRO begins either 1/2 or 1–1/2 bit times after send, de-

pending where send occurs.

The oscillator can be crystal controlled or ceramic reso-

nator controlled for required accuracy. OSC1 can be driven

from an external oscillator (see Figure 3).

MOTOROLA

MC14469

5

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