MC141585 Просмотр технического описания (PDF) - Motorola => Freescale
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MC141585 Datasheet PDF : 27 Pages
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Bit 1 CHS - It determines the height of a display sym-
bol. When this bit is set, the symbol is displayed in double
height.
Bit 0 CWS - Similar to bit 1, character is displayed in
double width, if this bit is set.
(III) Window/Control/Frame Register
Window 1 Registers
Row 15 Coln 0
ROW 15
COLN 0
7
6
5
4
3
2
1
0
ROW START ADDR
ROW END ADDR
MSB
LSB MSB
LSB
Row 15 Coln 1
ROW 15
COLN 1
7
6
5
4
COL START ADDR
MSB
3
2
LSB WEN
1
0
W_INT W_SHD
Bit 2 WEN - It enables the window 1 generation if this
bit is set.
Bit 1 W_INT - This additional color related bit provides
the color intensity selection for window 1. Setting this bit to 0
means low intensity in this window and R,G,B output voltage
level will be equal to VDD(I). Set this bit to 1 will switch the
supply source of R,G,B back to VDD. Default setting is 0.
Bit 0 W_SHD - Shadowing on Window. Set this bit to
activate the window 1 shadowing. When the window is
active, the right M pixels and lower N horizontal scan lines
will output shadowing. The width/height of window shadow,
number of M/N, is defined in the frame control registers
located at row 15 column 16 and 17 and the shadow color
can be selected in Window Shadow Color Registers at
row16 Column 2 and 3. See the following figure and the
related frame control register for detail.
M Pixels
N Horizontal Lines
WINDOW AREA
N Horizontal Lines
NOTE:
M and N are defined in the
frame control registers
located at row 15 column 16
and column 17.
Shadow color is defined by
by registers located at row 16
column 2 and 3.
M Pixels
Window Shadowing
Row 15 Coln 2
76
5432
ROW 15
COL END ADDR
COLN 2 MSB
LSB R
1
0
GB
Bit 2-0 R, G and B - Controls the color of window 1. Refer
to Table 1 for color selection. Window 1 registers occupy
Column 0-2 of Row 15, Window 2 from Column 3-5, Window
3 from 6-8 and Window 4 from 9-11. Window 1 has the high-
est priority, and Window 4 the least. If window over-lapping
occurs, the higher priority window will cover the lower one,
and the higher priority color will take over on the overlap win-
dow area. If the start address is greater than the end
address, this window will not be displayed.
Window 2 Registers
Row 15 Coln 3
ROW 15
COLN 3
7
6
5
4
3
2
1
0
ROW START ADDR
ROW END ADDR
MSB
LSB MSB
LSB
Row 15 Coln 4
ROW 15
COLN 4
7
6
5
4
COL START ADDR
MSB
3
2
1
0
LSB WEN W_INT W_SHD
Bit 2 WEN - It enables the window 2 generation if this
bit is set.
Bit 1 W_INT - This additional color related bit provides
the color intensity selection for window 2. Setting this bit to 0
means low intensity in this window and R,G,B output voltage
level will be equal to VDD(I). Set this bit to 1 will switch the
supply source of R,G,B back to VDD. Default setting is 0.
Bit 0 W_SHD - Shadowing on Window. Set this bit to
activate the window 2 shadowing.
Row 15 Coln 5
7
6
5
4
3
2
ROW 15
COL END ADDR
COLN 5 MSB
LSB R
1
0
GB
Bit 2-0 R, G and B - Controls the color of window 2.Refer
to Table 1 for color selection. Window 1 registers occupy
Column 0-2 of Row 15, Window 2 from Column 3-5, Window
3 from 6-8 and Window 4 from 9-11. Window 1 has the high-
est priority, and Window 4 the least. If window over-lapping
occurs, the higher priority window will cover the lower one,
and the higher priority color will take over on the overlap win-
dow area. If the start address is greater than the end
address, this window will not be displayed.
MC141585
10
MOTOROLA
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