MC10EP58, MC100EP58
NC 1
Da 2
Db 3
1
MUX
0
8 VCC
7Q
6Q
SEL 4
5 VEE
Figure 1. 8−Lead Pinout (Top View) and Logic Diagram
Table 1. PIN DESCRIPTION
PIN
Da*, Db*
SEL*
FUNCTION
ECL Data Inputs
ECL Select Inputs
Q, Q
VCC
VEE
ECL Data Outputs
Positive Supply
Negative Supply
NC
No Connect
EP
Exposed pad must be connected to a
sufficient thermal conduit. Electrically
connect to the most negative supply
or leave floating open.
* Pins will default LOW when left open.
Table 2. TRUTH TABLE
SEL
H
L
Data
a
b
Table 3. ATTRIBUTES
Characteristics
Internal Input Pulldown Resistor
Internal Input Pullup Resistor
ESD Protection
Human Body Model
Machine Model
Charged Device Model
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1)
SOIC−8
TSSOP−8
DFN8
Flammability Rating
Oxygen Index: 28 to 34
Transistor Count
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
1. For additional information, see Application Note AND8003/D.
Value
75 kW
N/A
> 4 kV
> 200 V
> 2 kV
Pb Pkg
Pb−Free Pkg
Level 1
Level 1
Level 1
Level 1
Level 3
Level 1
UL 94 V−0 @ 0.125 in
41 Devices
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2