MC10162FN Просмотр технического описания (PDF) - ON Semiconductor
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MC10162FN Datasheet PDF : 4 Pages
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MC10162
ELECTRICAL CHARACTERISTICS
Characteristic
Power Supply Drain Current
Input Current
Output Voltage
Output Voltage
Logic 1
Logic 0
Symbol
IE
IinH
IinL
VOH
VOL
Threshold Voltage Logic 1
Threshold Voltage Logic 0
VOHA
VOLA
Switching Times (50Ω Load)
Propagation Delay
Rise Time
Fall Time
(20 to 80%)
(20 to 80%)
t14+13–
t14–13+
t13+
t13–
Pin
Under
Test
8
14
14
13
13
13
13
13
13
13
13
13
13
–30°C
Min
Max
84
350
0.5
–1.060 –0.890
–1.890 –1.675
–1.890 –1.675
–1.080
–1.655
–1.655
1.5
6.2
1.5
6.2
1.0
3.3
1.0
3.3
Test Limits
+25°C
Min
Typ
Max
61
76
220
0.5
–0.960
–0.810
–1.850
–1.850
–1.650
–1.650
–0.980
–1.630
–1.630
1.5
4.0
6.0
1.5
4.0
6.0
1.1
2.0
3.3
1.1
2.0
3.3
+85°C
Min
Max
84
220
0.3
–0.890 –0.700
–1.825 –1.615
–1.825 –1.615
–0.910
–1.595
–1.595
1.5
6.4
1.5
6.4
1.1
3.5
1.1
3.5
Unit
mAdc
µAdc
µAdc
Vdc
Vdc
Vdc
Vdc
ns
ELECTRICAL CHARACTERISTICS (continued)
TEST VOLTAGE VALUES (Volts)
@ Test Temperature
–30°C
VIHmax
–0.890
VILmin
–1.890
VIHAmin
–1.205
VILAmax
–1.500
VEE
–5.2
+25°C –0.810
–1.850
–1.105
–1.475
–5.2
+85°C –0.700
–1.825
–1.035
–1.440
–5.2
Characteristic
Power Supply Drain Current
Input Current
Output Voltage
Output Voltage
Logic 1
Logic 0
Symbol
IE
IinH
IinL
VOH
VOL
Pin
Under
Test
8
14
14
13
13
13
TEST VOLTAGE APPLIED TO PINS LISTED BELOW
VIHmax
VILmin
VIHAmin
VILAmax
VEE
8
14
8
14
8
14
8
2
8
15
8
(VCC)
Gnd
1,16
1,16
1,16
1,16
1,16
1,16
Threshold Voltage
Threshold Voltage
Logic 1 VOHA
13
Logic 0 VOLA
13
13
14
8
1,16
2
8
1,16
15
8
1,16
Switching Times
(50Ω Load)
Pulse In Pulse Out –3.2 V
+2.0 V
Propagation Delay
t14+13+
13
t14–13–
13
Rise Time
(20 to 80%)
t+
13
14
13
14
13
14
13
8
1,16
8
1,16
8
1,16
Fall Time
(20 to 80%)
t–
13
14
13
8
1,16
Each MECL 10,000 series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been
established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 linear fpm is maintained.
Outputs are terminated through a 50–ohm resistor to –2.0 volts. Test procedures are shown for only one gate. The other gates are tested in the
same manner.
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