MC100EL17DWG Просмотр технического описания (PDF) - ON Semiconductor
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MC100EL17DWG Datasheet PDF : 6 Pages
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MC100EL17
VCC Q0 Q0 Q1 Q1 Q2 Q2 Q3 Q3 VEE
20 19 18 17 16 15 14 13 12 11
1 2 3 4 5 6 7 8 9 10
VCC D0 D0 D1 D1 D2 D2 D3 D3 VBB
* All VCC pins are tied together on the die.
Warning: All VCC and VEE pins must be externally connected to Power
Supply to guarantee proper operation.
Figure 1. Logic Diagram and Pinout: (Top View)
Table 1. PIN DESCRIPTION
PIN
Dn, Dn
Qn, Qn
VBB
VCC
VEE
FUNCTION
ECL Differential Data Inputs
ECL Differential Data Outputs
Reference Voltage Output
Positive Supply
Negative Supply
Table 2. ATTRIBUTES
Characteristics
Internal Input Pulldown Resistor
Internal Input Pullup Resistor
ESD Protection
Human Body Model
Machine Model
Charged Device Model
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1)
Flammability Rating
Oxygen Index: 28 to 34
Transistor Count
Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
1. For additional information, see Application Note AND8003/D.
Value
75 KW
75 KW
> 2 KV
> 200 V
>4V
Level 1
UL 94 V−0 @ 0.125 in
141
Table 3. MAXIMUM RATINGS
Symbol
Parameter
VCC
PECL Mode Power Supply
VEE
NECL Mode Power Supply
VI
PECL Mode Input Voltage
NECL Mode Input Voltage
Condition 1
VEE = 0 V
VCC = 0 V
VEE = 0 V
VCC = 0 V
Condition 2
VI ≤ VCC
VI ≥ VEE
Rating
8
−8
6
−6
Units
V
V
V
Iout
Output Current
Continuous
Surge
50
mA
100
mA
IBB
VBB Sink/Source
TA
Operating Temperature Range
Tstg
Storage Temperature Range
qJA
Thermal Resistance (Junction−to−Ambient) 0 lfpm
500 lfpm
SO−20L
SO−20L
± 0.5
−40 to +85
−65 to +150
90
60
mA
°C
°C
°C/
°C/W
qJC
Thermal Resistance (Junction−to−Case) Standard Board
SO−20L
30 to 35
°C/W
Tsol
Wave Solder
Pb <2 to 3 sec @ 248°C
Pb−Free <2 to 3 sec @ 260°C
265
°C
265
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
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