MBM29F080A Просмотр технического описания (PDF) - Spansion Inc.

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Компоненты Описание

производитель

MBM29F080A

FLASH MEMORY CMOS 8M (1M ×8) BIT

Spansion Inc. 

MBM29F080A-55/-70/-90

Command

Sequence

MBM29F080A Command Definitions Table

Bus

Write

First Bus Second Bus

Write Cycle Write Cycle

Cycles

Req'd

Addr. Data Addr. Data

Third Bus

Write Cycle

Addr. Data

Fourth Bus

Read/Write

Cycle

Addr. Data

Fifth Bus Sixth Bus

Write Cycle Write Cycle

Addr. Data Addr. Data

Read/Reset*1

1 XXXh F0h — — — — — — — — — —

Reset/Read*1

3 555h AAh 2AAh 55h 555h F0h RA*2 RD*2 — — — —

Manufacture Code 3 555h AAh 2AAh 55h 555h 90h 00h*2 04h*2 — — — —

Device Code

3 555h AAh 2AAh 55h 555h 90h 01h*2 05h*2 — — — —

Byte Program

4 555h AAh 2AAh 55h 555h A0h PA PD — — — —

Chip Erase

6 555h AAh 2AAh 55h 555h 80h 555h AAh 2AAh 55h 555h 10h

Sector Erase

6 555h AAh 2AAh 55h 555h 80h 555h AAh 2AAh 55h SA 30h

Sector Erase Suspend Erase can be suspended during sector erase with Addr (“H” or “L”), Data (B0h)

Sector Erase Resume Erase can be resumed after suspend with Addr (“H” or “L”), Data (30h)

Notes : • Address bits A11 to A19 = X = “H” or “L” for all address commands except or Program Address (PA) and

Sector Address (SA).

• Bus operations are defined in “MBM29F080A User Bus Operations Table” in “sFLEXIBLE SECTOR-

ERASE ARCHITECTURE”.

• RA = Address of the memory location to be read.

PA = Address of the memory location to be programmed. Addresses are latched on the falling edge of

the WE pulse.

SA = Address of the sector to be erased. The combination of A19, A18, A17, and A16 will uniquely select

any sector.

• RD = Data read from location RA during read operation.

PD = Data to be programmed at location PA. Data is latched on the rising edge of WE.

• Read and Byte program functions to non-erasing sectors are allowed in the Erase Suspend mode.

• The system should generate the following address pattens: 555h or 2AAh to addresses A0 to A10.

• The command combinations not described in “MBM29F080A Command Definitions Table” in “sFLEXIBLE

SECTOR-ERASE ARCHITECTURE” are illegal.

*1: Either of the two reset commands will reset the device.

*2: The fourth bus cycle is only for read.

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