MAX9321B Просмотр технического описания (PDF) - Maxim Integrated

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MAX9321B

Differential PECL/ECL/LVPECL/LVECL Receiver/Driver

Maxim Integrated 

Differential PECL/ECL/LVPECL/LVECL

Receiver/Driver

AC ELECTRICAL CHARACTERISTICS (continued)

(VCC - VEE = 3.0V to 5.5V, outputs loaded with 50Ω ±1% to VCC - 2V, input frequency ≤ 1.5GHz, input transition time = 125ps (20% to

80%), VIHD = VEE + 1.2V to VCC, VILD = VEE to VCC - 0.15V, VIHD - VILD = 0.15V to 3.0V. Typical values are at VCC - VEE = 5V, VIHD =

VCC - 1V, VILD = VCC - 1.5V, unless otherwise noted.) (Notes 1, 7)

PARAMETER SYMBOL

CONDITIONS

-40°C

+25°C

+85°C

UNITS

MIN TYP MAX MIN TYP MAX MIN TYP MAX

Added

Deterministic

Jitter

3.0Gpbs

tDJ

223 - 1 PRBS pattern

(Note 9)

57 80

57 80

57

80

ps

(P-P)

VOH - VOL ≥ 300mV,

clock pattern,

3.0

3.0

3.0

Switching

Frequency

fMAX

Figure 2

VOH - VOL ≥ 550mV,

GHz

clock pattern,

2.0

2.0

2.0

Figure 2

Output Rise/

Fall Time

(20% to 80%)

tR, tF Figure 2

65 112 135 65 118 135 65 121 135 ps

Note 1: Measurements are made with the device in thermal equilibrium.

Note 2: Current into a pin is defined as positive. Current out of a pin is defined as negative.

Note 3: DC parameters production tested at TA = +25°C. Guaranteed by design and characterization over the full operating temp-

erature range.

Note 4: Maximum differential input voltage limit of ±3V also applies to single-ended use.

Note 5: Use VBB as a reference for inputs on the same device only.

Note 6: All pins open except VCC and VEE.

Note 7: Guaranteed by design and characterization. Limits are set at ±6 sigma.

Note 8: Measured between outputs of different parts at the signal crossing points under identical conditions for a same-edge transition.

Note 9: Device jitter added to the input signal.

4 _______________________________________________________________________________________

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