MAX550BEUA Просмотр технического описания (PDF) - Maxim Integrated
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MAX550BEUA Datasheet PDF : 12 Pages
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Low-Power, +2.5V to +5.5V, 8-Bit
Voltage-Output DAC in µMAX
ELECTRICAL CHARACTERISTICS (continued)
(VDD1 = VDD2 = +2.5V to +5.5V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP
DYNAMIC PERFORMANCE
Digital Feedthrough and
Crosstalk
CS = high, all digital inputs from 0V to VDD_
50
Voltage-Output Settling Time
To ±1/2LSB, CL = 20pF
4
Voltage-Output Slew Rate
SR
CL = 20pF
VDD_ = 2.5V
VDD_ = 5.5V
1.4
3.1
Wake-Up Time
CLOAD = 20pF
4
POWER SUPPLIES
Supply Voltage Range
VDD_ Output unloaded, all inputs = GND or VDD
2.5
Supply Current
IDD1 + VDD_ = 5.5V, output unloaded,
IDD2 all inputs = GND or VDD_
0.3
Shutdown Current
Shutdown mode
0.3
Note 1: 0°C to -40°C testing guaranteed by design using six sigma design limits.
Note 2: Worst-case input resistance at REF occurs at DAC code 55 hex.
Note 3: Worst-case reference input current occurs at DAC code 55 hex.
Note 4: Guaranteed by design. Not production tested.
MAX UNITS
nV-sec
µs
V/µs
µs
5.5
V
10
µA
µA
TIMING CHARACTERISTICS (Note 5)
(VDD1 = VDD2 = +2.5V to +5.5V, TA = TMIN to TMAX, unless otherwise noted. Digital inputs switching from 0V to VDD_.)
PARAMETER
SCLK Pulse Width High
SCLK Pulse Width Low
DIN to SCLK High Setup
DIN to SCLK High Hold
CS Low to SCLK High Setup
CS High to SCLK High Setup
SCLK High to CS Low Hold
Delay, SCLK High to CS High
CS Pulse Width High
SCLK Period
VDD_ High to CS Low
SYMBOL
tCH
tCL
tDS
tDH
tCSS0
tCSS1
tCSH0
tCSH1
tCSW
tCP
CONDITIONS
VDD_ = 2.5V
VDD_ = 5.5V
VDD_ = 2.5V
VDD_ = 5.5V
Power-on reset delay
MIN TYP MAX
40
40
30
0
10
30
30
20
10
20
40
80
5
Note 5: Guaranteed by design. Not production tested.
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
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