MAX5580A(2008) Просмотр технического описания (PDF) - Maxim Integrated

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производитель

MAX5580A
(Rev.:2008)

Buffered, Fast-Settling, Quad, 12-/10-/8-Bit, Voltage-Output DACs

Maxim Integrated 

Buffered, Fast-Settling, Quad,

12-/10-/8-Bit, Voltage-Output DACs

ELECTRICAL CHARACTERISTICS (continued)

(AVDD = 2.7V to 5.25V, DVDD = 1.8V to AVDD, VAGND = 0, VDGND = 0, VREF = 2.5V (for AVDD = 2.7V to 5.25V), VREF = 4.096V (for

AVDD = 4.5V to 5.25V), RL = 10kΩ, CL = 100pF, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)

PARAMETER

SYMBOL

POWER REQUIREMENTS

CONDITIONS

MIN TYP MAX UNITS

Analog Supply Voltage

Range

AVDD

2.70

5.25

V

Digital Supply Voltage

Range

DVDD

1.8

AVDD

V

Operating Supply

Current

IAVDD

+

IDVDD

SLOW mode, all digital inputs

at DGND or DVDD, no load,

VREF = 4.096V

FAST mode, all digital inputs

at DGND or DVDD, no load,

VREF = 4.096V

Unity gain

Force sense

Unity gain

Force sense

0.9

1.6

1.6

2.4

mA

1.6

4

2.3

4

Shutdown Supply

Current

IAVDD(SHDN)

+

IDVDD(SHDN)

No clocks, all digital inputs at DGND or DVDD, all

DACs in shutdown mode

0.5

1

µA

Note 1: For the force-sense versions, FB_ is connected to its respective OUT_, and VOUT (max) = VREF / 2, unless otherwise noted.

Note 2: Linearity guaranteed from decimal code 250 to code 4095 for the MAX5580A/MAX5581A (12 bit, A grade), code 40 to code

4095 for the MAX5580B/MAX5581B (12 bit, B grade), code 20 to code 1023 for the MAX5582/MAX5583 (10 bit), and code 5

to code 255 for the MAX5584/MAX5585 (8 bit).

Note 3: Represents the functional range. The linearity is guaranteed at VREF = 2.5V (for AVDD from 2.7V to 5.25V), and VREF =

4.096V (for AVDD = 4.5V to 5.25V). See the Typical Operating Characteristics section for linearity at other voltages.

Note 4: Guaranteed by design.

Note 5: The reference -3dB bandwidth is measured with a 0.1VP-P sine wave on VREF and with full-scale input code.

Note 6: DC crosstalk is measured as follows: outputs of DACA–DACD are set to full scale and the output of DACD is measured.

While keeping DACD unchanged, the outputs of DACA–DACC are transitioned to zero scale and the ∆VOUT of DACD

is measured.

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